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Searched refs:SCL_CSEN (Results 1 – 2 of 2) sorted by relevance

/drivers/ddr/microchip/
A Dddr2_regs.h135 #define SCL_CSEN BIT(0) macro
A Dddr2.c41 writel(SCL_CSEN | SCL_WCAS_LAT(WL), &ddr2_phy->scl_config_2); in ddr2_phy_init()

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