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Searched refs:bits (Results 1 – 25 of 59) sorted by relevance

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/drivers/ram/stm32mp1/
A Dstm32mp1_ram.c198 bits++; in get_nb_bank()
202 bits++; in get_nb_bank()
206 bits++; in get_nb_bank()
213 u8 bits; in get_nb_col() local
223 bits++; in get_nb_col()
227 bits++; in get_nb_col()
231 bits++; in get_nb_col()
235 bits++; in get_nb_col()
241 bits++; in get_nb_col()
245 bits++; in get_nb_col()
[all …]
/drivers/power/domain/
A Dimx8m-power-domain.c132 } bits; member
165 .bits = {
173 .bits = {
181 .bits = {
189 .bits = {
207 .bits = {
279 .bits = {
287 .bits = {
295 .bits = {
303 .bits = {
[all …]
/drivers/gpio/
A Dstm32_gpio.c57 int bits; in stm32_gpio_set_otype() local
59 bits = OTYPE_BITS(idx); in stm32_gpio_set_otype()
60 clrsetbits_le32(&regs->otyper, OTYPE_MSK << bits, otype << bits); in stm32_gpio_set_otype()
73 int bits; in stm32_gpio_set_pupd() local
75 bits = PUPD_BITS(idx); in stm32_gpio_set_pupd()
76 clrsetbits_le32(&regs->pupdr, PUPD_MASK << bits, pupd << bits); in stm32_gpio_set_pupd()
A DKconfig517 bool "74x164 serial-in/parallel-out 8-bits shift register"
532 4 bits: pca9536, pca9537
534 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
540 24 bits: tca6424
542 40 bits: pca9505, pca9698
544 Now, max 24 bits chips and PCA953X compatible chips are
563 4 bits: pca9536, pca9537
571 24 bits: tca6424
573 40 bits: pca9505, pca9698
575 Now, max 24 bits chips and PCA953X compatible chips are
[all …]
/drivers/sysreset/
A Dsysreset_mpc83xx.c140 } bits[] = { in mpc83xx_sysreset_get_status() local
167 for (i = 0; i < ARRAY_SIZE(bits); i++) in mpc83xx_sysreset_get_status()
169 if (rsr & bits[i].mask) { in mpc83xx_sysreset_get_status()
170 res = snprintf(buf, size, "%s%s%s", sep, bits[i].desc, in mpc83xx_sysreset_get_status()
171 (i == ARRAY_SIZE(bits) - 1) ? "\n" : ""); in mpc83xx_sysreset_get_status()
/drivers/video/
A Dhitachi_tx18d42vm_lcd.c21 unsigned int data, int bits) in lcd_panel_spi_write() argument
26 for (i = 0; i < bits; i++) { in lcd_panel_spi_write()
28 offset = (bits - 1) - i; in lcd_panel_spi_write()
A Dconsole_core.c99 uchar bits; in fill_char_vertically() local
110 bits = pfont[col]; in fill_char_vertically()
113 u32 value = (bits & 0x80) ? in fill_char_vertically()
122 bits <<= 1; in fill_char_vertically()
A Dconsole_truetype.c287 u8 *bits, *data; in console_truetype_putc_xy() local
338 bits = data; in console_truetype_putc_xy()
359 int val = *bits; in console_truetype_putc_xy()
369 bits++; in console_truetype_putc_xy()
380 int val = *bits; in console_truetype_putc_xy()
392 bits++; in console_truetype_putc_xy()
404 int val = *bits; in console_truetype_putc_xy()
417 bits++; in console_truetype_putc_xy()
/drivers/net/
A Dmdio_gpio.c125 static void mdio_gpio_send_num(struct udevice *mdio_dev, u16 val, int bits) in mdio_gpio_send_num() argument
129 for (i = bits - 1; i >= 0; i--) in mdio_gpio_send_num()
134 static u16 mdio_gpio_get_num(struct udevice *mdio_dev, int bits) in mdio_gpio_get_num() argument
139 for (i = bits - 1; i >= 0; i--) { in mdio_gpio_get_num()
A Ddwc_eth_qos_intel.c256 static int xpcs_clr_bits(struct udevice *dev, int reg, u16 bits) in xpcs_clr_bits() argument
264 ret &= ~bits; in xpcs_clr_bits()
269 static int xpcs_set_bits(struct udevice *dev, int reg, u16 bits) in xpcs_set_bits() argument
277 ret |= bits; in xpcs_set_bits()
/drivers/mux/
A Dmmio.c103 int bits; in mmio_mux_probe() local
121 bits = 1 + field.msb - field.lsb; in mmio_mux_probe()
122 mux->states = 1 << bits; in mmio_mux_probe()
/drivers/phy/
A Dphy-rcar-gen3.c153 u32 bits = USB2_ADPCTRL_DRVVBUS; in rcar_gen3_phy_set_vbus() local
157 bits = USB2_VBCTRL_VBOUT; in rcar_gen3_phy_set_vbus()
162 setbits_le32(priv->regs + reg, bits); in rcar_gen3_phy_set_vbus()
164 clrbits_le32(priv->regs + reg, bits); in rcar_gen3_phy_set_vbus()
/drivers/spi/
A Dmpc8xxx_spi.c227 u32 bits, mask, div16, pm; in mpc8xxx_spi_set_speed() local
245 bits = div16 | (pm << SPI_MODE_PM_SHIFT); in mpc8xxx_spi_set_speed()
248 if ((mode & mask) != bits) { in mpc8xxx_spi_set_speed()
252 mode |= bits; in mpc8xxx_spi_set_speed()
A Dspi-sunxi.c89 #define SPI_BIT(priv, bit) ((priv)->variant->bits[bit])
128 const u32 *bits; member
542 .bits = sun4i_spi_bits,
549 .bits = sun6i_spi_bits,
558 .bits = sun6i_spi_bits,
567 .bits = sun6i_spi_bits,
/drivers/usb/mtu3/
A Dmtu3.h382 static inline void mtu3_setbits(void __iomem *base, u32 offset, u32 bits) in mtu3_setbits() argument
387 writel((tmp | (bits)), addr); in mtu3_setbits()
390 static inline void mtu3_clrbits(void __iomem *base, u32 offset, u32 bits) in mtu3_clrbits() argument
395 writel((tmp & ~(bits)), addr); in mtu3_clrbits()
/drivers/clk/at91/
A Dpmc.c71 unsigned int mask, unsigned int bits) in pmc_update_bits() argument
77 writel(tmp | (bits & mask), base + off); in pmc_update_bits()
/drivers/mtd/nand/raw/
A Dnand_bbt.c178 int bits = td->options & NAND_BBT_NRBITS_MSK; in read_bbt() local
179 uint8_t msk = (uint8_t)((1 << bits) - 1); in read_bbt()
183 totlen = (num * bits) >> 3; in read_bbt()
217 for (j = 0; j < 8; j += bits, act++) { in read_bbt()
624 int bits, startblock, dir, page, offs, numblocks, sft, sftmsk; in write_bbt() local
697 bits = td->options & NAND_BBT_NRBITS_MSK; in write_bbt()
699 switch (bits) { in write_bbt()
1027 u32 bits; in verify_bbt_descr() local
1034 bits = bd->options & NAND_BBT_NRBITS_MSK; in verify_bbt_descr()
1038 BUG_ON(!bits); in verify_bbt_descr()
[all …]
/drivers/ddr/altera/
A Dsdram_gen5.c76 int bits, inewrowslog2; in get_errata_rows() local
96 bits = generic_hweight32(newrows); in get_errata_rows()
98 debug("rows workaround - bits %d\n", bits); in get_errata_rows()
100 if (bits != 1) { in get_errata_rows()
101 printf("SDRAM workaround failed, bits set %d\n", bits); in get_errata_rows()
/drivers/rtc/
A Dmax313xx.c189 static int max313xx_set_bits(struct udevice *dev, unsigned int reg, unsigned int bits) in max313xx_set_bits() argument
197 return dm_i2c_reg_write(dev, reg, ret | bits); in max313xx_set_bits()
200 static int max313xx_clear_bits(struct udevice *dev, unsigned int reg, unsigned int bits) in max313xx_clear_bits() argument
208 return dm_i2c_reg_write(dev, reg, ret & ~bits); in max313xx_clear_bits()
/drivers/video/stm32/
A DKconfig45 int "Maximum bits per pixel (for memory allocation purposes)"
49 The maximum bits per pixel to support for the framebuffer.
/drivers/ddr/fsl/
A Dfsl_mmdc.c15 static void set_wait_for_bits_clear(void *ptr, u32 value, u32 bits) in set_wait_for_bits_clear() argument
21 while (in_be32(ptr) & bits) { in set_wait_for_bits_clear()
/drivers/net/ti/
A Dcpsw.c30 #define BITMASK(bits) (BIT(bits) - 1) argument
219 static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits) in cpsw_ale_get_field() argument
226 return (ale_entry[idx] >> start) & BITMASK(bits); in cpsw_ale_get_field()
229 static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits, in cpsw_ale_set_field() argument
234 value &= BITMASK(bits); in cpsw_ale_set_field()
238 ale_entry[idx] &= ~(BITMASK(bits) << start); in cpsw_ale_set_field()
242 #define DEFINE_ALE_FIELD(name, start, bits) \ argument
245 return cpsw_ale_get_field(ale_entry, start, bits); \
249 cpsw_ale_set_field(ale_entry, start, bits, value); \
/drivers/video/rockchip/
A Drk_mipi.c55 u32 bits = (reg >> BITS_SHIFT) & 0xff; in rk_mipi_dsi_write() local
59 mask = ~((0xffffffff << offset) & (0xffffffff >> (32 - offset - bits))); in rk_mipi_dsi_write()
62 val &= ~(0xffffffff << bits); in rk_mipi_dsi_write()
/drivers/phy/allwinner/
A Dphy-sun4i-usb.c157 u32 bits, reg_value; in sun4i_usb_phy_passby() local
162 bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN | in sun4i_usb_phy_passby()
167 bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT | in sun4i_usb_phy_passby()
173 reg_value |= bits; in sun4i_usb_phy_passby()
175 reg_value &= ~bits; in sun4i_usb_phy_passby()
/drivers/serial/
A Dsandbox.c194 u8 bits = SERIAL_GET_BITS(serial_config); in sandbox_serial_setconfig() local
197 if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || in sandbox_serial_setconfig()

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