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Searched refs:buffers (Results 1 – 20 of 20) sorted by relevance

/drivers/net/octeontx2/
A Dnix.c72 size_t buffer_size, u32 queue_length, void *buffers[]) in npa_setup_pool() argument
81 buffers[index] = memalign(CONFIG_SYS_CACHELINE_SIZE, in npa_setup_pool()
83 if (!buffers[index]) { in npa_setup_pool()
89 __func__, index, buffers[index], buffer_size); in npa_setup_pool()
94 aura_descr.f0.s.addr = (u64)buffers[index]; in npa_setup_pool()
220 npa->buffers[idx] = nix_memalloc(npa->q_len[idx], in npa_lf_setup()
223 if (!npa->buffers[idx]) { in npa_lf_setup()
231 npa->q_len[idx], npa->buffers[idx]); in npa_lf_setup()
261 free(npa->buffers[pool]); in npa_lf_shutdown()
262 npa->buffers[pool] = NULL; in npa_lf_shutdown()
A Dnix.h137 void **buffers[NPA_POOL_COUNT]; member
/drivers/mtd/nand/raw/
A Dmxs_nand_spl.c223 nand_chip.buffers = memalign(ARCH_DMA_MINALIGN, in nand_init()
224 sizeof(*nand_chip.buffers)); in nand_init()
225 nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize; in nand_init()
A Dnand_base.c1869 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_read_page_swecc()
1870 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_swecc()
1990 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); in nand_read_subpage()
1995 &chip->buffers->ecccode[i], in nand_read_subpage()
2028 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_read_page_hwecc()
2029 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_hwecc()
2098 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_hwecc_oob_first()
3005 ecc_calc = chip->buffers->ecccalc; in nand_write_subpage_hwecc()
3274 wbuf = chip->buffers->databuf; in nand_do_write_ops()
4946 chip->buffers = nbuf; in nand_scan_tail()
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A Dzynq_nand.c584 u8 *ecc_calc = chip->buffers->ecccalc; in zynq_nand_write_page_hwecc()
644 u8 *ecc_calc = chip->buffers->ecccalc; in zynq_nand_write_page_swecc()
677 u8 *ecc_calc = chip->buffers->ecccalc; in zynq_nand_read_page_hwecc()
678 u8 *ecc_code = chip->buffers->ecccode; in zynq_nand_read_page_hwecc()
750 u8 *ecc_calc = chip->buffers->ecccalc; in zynq_nand_read_page_swecc()
751 u8 *ecc_code = chip->buffers->ecccode; in zynq_nand_read_page_swecc()
A Ddavinci_nand.c433 uint8_t *ecc_code = chip->buffers->ecccode; in nand_davinci_read_page_hwecc()
434 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_davinci_read_page_hwecc()
A Domap_gpmc.c715 uint8_t *ecc_calc = chip->buffers->ecccalc; in omap_read_page_bch()
716 uint8_t *ecc_code = chip->buffers->ecccode; in omap_read_page_bch()
A Dstm32_fmc2_nand.c520 u8 *ecc_calc = chip->buffers->ecccalc; in stm32_fmc2_nfc_read_page()
521 u8 *ecc_code = chip->buffers->ecccode; in stm32_fmc2_nfc_read_page()
A Dcortina_nand.c592 unsigned char *ecc_code = chip->buffers->ecccode; in ca_do_bch_decode()
651 &chip->buffers->ecccode[i], in ca_do_bch_decode()
A Dnand_bbt.c824 return create_bbt(mtd, this->buffers->databuf, bd, -1); in nand_memory_bbt()
A Ddenali.c288 uint8_t *ecc_code = chip->buffers->ecccode; in denali_check_erased_page()
A Dpxa3xx_nand.c1339 return chip->ecc.read_page_raw(mtd, chip, chip->buffers->databuf, true, in pxa3xx_nand_read_oob_raw()
/drivers/net/fsl-mc/dpio/
A Dqbman_portal.c545 const uint64_t *buffers, unsigned int num_buffers) in qbman_swp_release() argument
558 u64_to_le32_copy(&p[2], buffers, num_buffers); in qbman_swp_release()
578 int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers, in qbman_swp_acquire() argument
613 u64_from_le32_copy(buffers, &p[2], num); in qbman_swp_acquire()
/drivers/net/octeontx/
A Dnicvf_queues.c105 rbdr->buffers = NICVF_ALIGNED_ADDR(rbdr->buf_mem, in nicvf_init_rbdr()
109 __func__, __LINE__, rbdr->buf_mem, rbdr->buffers); in nicvf_init_rbdr()
112 rbuf = rbdr->buffers + DMA_BUFFER_LEN * idx; in nicvf_init_rbdr()
A Dnicvf_queues.h243 uintptr_t buffers; member
/drivers/core/
A DKconfig476 A second possible use of bounce buffers is their ability to
477 provide aligned buffers for DMA operations.
/drivers/mtd/spi/
A DKconfig264 DataFlash is a kind of SPI flash. Most AT45 chips have two buffers
/drivers/usb/musb-new/
A Dmusb_gadget.c1293 static LIST_HEAD(buffers);
/drivers/mmc/
A DKconfig547 SRAM which is the L2 cache locked to memory. When the MMC buffers
/drivers/mtd/nand/raw/brcmnand/
A Dbrcmnand.c1937 buf = chip->buffers->databuf; in brcmstb_nand_verify_erased_page()

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