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Searched refs:bypass (Results 1 – 19 of 19) sorted by relevance

/drivers/clk/sophgo/
A Dclk-ip.h40 struct cv1800b_clk_regbit bypass; member
54 struct cv1800b_clk_regbit bypass; member
71 struct cv1800b_clk_regbit bypass; member
84 struct cv1800b_clk_regbit bypass; member
142 .bypass = CV1800B_CLK_REGBIT(_bypass_offset, \
169 .bypass = CV1800B_CLK_REGBIT(_bypass_offset, \
208 .bypass = CV1800B_CLK_REGBIT(_bypass_offset, \
243 .bypass = CV1800B_CLK_REGBIT(_bypass_offset, \
A Dclk-ip.c134 if (cv1800b_clk_getbit(div->div.base, &div->bypass)) in bypass_div_get_rate()
144 if (cv1800b_clk_getbit(div->div.base, &div->bypass)) in bypass_div_set_rate()
155 cv1800b_clk_setbit(div->div.base, &div->bypass); in bypass_div_set_parent()
162 cv1800b_clk_clrbit(div->div.base, &div->bypass); in bypass_div_set_parent()
239 cv1800b_clk_setbit(div->div.base, &div->bypass); in bypass_fixed_div_set_parent()
246 cv1800b_clk_clrbit(div->div.base, &div->bypass); in bypass_fixed_div_set_parent()
367 cv1800b_clk_setbit(mux->mux.base, &mux->bypass); in bypass_mux_set_parent()
376 cv1800b_clk_clrbit(mux->mux.base, &mux->bypass); in bypass_mux_set_parent()
420 if (cv1800b_clk_getbit(mmux->base, &mmux->bypass)) in mmux_get_rate()
468 cv1800b_clk_setbit(mmux->base, &mmux->bypass); in mmux_set_parent()
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/drivers/iommu/
A Dapple_dart.c74 int bypass, shift; member
121 if (priv->bypass) in apple_dart_map()
150 if (priv->bypass) in apple_dart_unmap()
242 priv->bypass = 1; in apple_dart_probe()
A DKconfig24 configuration to put the DART into bypass mode such that it can
/drivers/ddr/imx/imx8ulp/
A DKconfig8 bool "Enable the DDR PHY PLL bypass mode, so PHY clock is from DDR_CLK"
/drivers/clk/
A Dclk_zynq.c135 u32 clk_ctrl, reset, pwrdwn, mul, bypass; in zynq_clk_get_pll_rate() local
144 bypass = clk_ctrl & PLLCTRL_BPFORCE_MASK; in zynq_clk_get_pll_rate()
145 if (bypass) in zynq_clk_get_pll_rate()
/drivers/clk/stm32/
A Dclk-stm32mp13.c1269 static void stm32mp1_lse_enable(fdt_addr_t rcc, int bypass, int digbyp, in stm32mp1_lse_enable() argument
1277 if (bypass || digbyp) in stm32mp1_lse_enable()
1312 static void stm32mp1_hse_enable(fdt_addr_t rcc, int bypass, int digbyp, int css) in stm32mp1_hse_enable() argument
1316 if (bypass || digbyp) in stm32mp1_hse_enable()
1772 int bypass, digbyp; in stm32mp1_clktree() local
1776 bypass = dev_read_bool(dev, "st,bypass"); in stm32mp1_clktree()
1782 stm32mp1_lse_enable(rcc, bypass, digbyp, lsedrv); in stm32mp1_clktree()
1787 int bypass, digbyp, css; in stm32mp1_clktree() local
1790 bypass = dev_read_bool(dev, "st,bypass"); in stm32mp1_clktree()
1794 stm32mp1_hse_enable(rcc, bypass, digbyp, css); in stm32mp1_clktree()
A Dclk-stm32mp1.c1473 static void stm32mp1_lse_enable(fdt_addr_t rcc, int bypass, int digbyp, in stm32mp1_lse_enable() argument
1481 if (bypass || digbyp) in stm32mp1_lse_enable()
1516 static void stm32mp1_hse_enable(fdt_addr_t rcc, int bypass, int digbyp, int css) in stm32mp1_hse_enable() argument
1520 if (bypass || digbyp) in stm32mp1_hse_enable()
1984 int bypass, digbyp; in stm32mp1_clktree() local
1988 bypass = dev_read_bool(dev, "st,bypass"); in stm32mp1_clktree()
1994 stm32mp1_lse_enable(rcc, bypass, digbyp, lsedrv); in stm32mp1_clktree()
1998 int bypass, digbyp, css; in stm32mp1_clktree() local
2001 bypass = dev_read_bool(dev, "st,bypass"); in stm32mp1_clktree()
2005 stm32mp1_hse_enable(rcc, bypass, digbyp, css); in stm32mp1_clktree()
/drivers/clk/at91/
A Dclk-main.c193 const char *parent_name, bool bypass) in at91_clk_main_osc() argument
209 if (bypass) { in at91_clk_main_osc()
A Dpmc.h105 const char *parent_name, bool bypass);
/drivers/clk/ti/
A Dclk-k3-pll.c334 static void ti_pll_clk_bypass(struct ti_pll_clk *pll, bool bypass) in ti_pll_clk_bypass() argument
339 if (bypass) in ti_pll_clk_bypass()
/drivers/ram/aspeed/
A DKconfig26 Say Y here to bypass DRAM self test to speed up the boot time.
/drivers/spi/
A Dcadence_qspi.h313 unsigned int bypass, unsigned int delay);
A Dcadence_qspi_apb.c178 unsigned int bypass, unsigned int delay) in cadence_qspi_apb_readdata_capture() argument
185 if (bypass) in cadence_qspi_apb_readdata_capture()
/drivers/clk/aspeed/
A Dclk_ast2600.c66 unsigned int bypass : 1; member
164 if (!pll_reg.b.bypass) { in ast2600_get_pll_rate()
539 p_cfg->reg.b.bypass = 0; in ast2600_configure_pll()
/drivers/fastboot/
A DKconfig108 to bypass any restrictions you have in place.
251 attacker to bypass any restrictions you have in place.
/drivers/net/
A Dsja1105.c434 u64 bypass; member
1726 sja1105_packing(buf, &cmd->bypass, 1, 1, size, op); in sja1105_cgu_pll_control_packing()
2086 pll.bypass = 0x0; in sja1105_cgu_rmii_pll_config()
/drivers/video/sunxi/
A Dsunxi_display.c388 setbits_le32(&de_fe->bypass, SUNXI_DE_FE_BYPASS_CSC_BYPASS); in sunxi_frontend_mode_set()
/drivers/serial/
A DKconfig633 once the JTAG terminal is connected. Without the bypass, the console

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