Home
last modified time | relevance | path

Searched refs:cfg_base (Results 1 – 19 of 19) sorted by relevance

/drivers/pci/
A Dpci-rcar-gen2.c88 fdt_addr_t cfg_base; member
125 writel(reg, priv->cfg_base + RCAR_AHBPCI_WIN1_CTR_REG); in setup_bus_address()
186 clrsetbits_le32(priv->cfg_base + RCAR_USBCTR_REG, in rcar_gen2_pci_probe()
195 priv->cfg_base + RCAR_PCIAHB_WIN1_CTR_REG); in rcar_gen2_pci_probe()
197 priv->cfg_base + RCAR_PCIAHB_WIN2_CTR_REG); in rcar_gen2_pci_probe()
199 priv->cfg_base + RCAR_AHBPCI_WIN2_CTR_REG); in rcar_gen2_pci_probe()
200 setbits_le32(priv->cfg_base + RCAR_PCI_ARBITER_CTR_REG, in rcar_gen2_pci_probe()
206 writel(priv->cfg_base + 0x800, devad + PCI_BASE_ADDRESS_0); in rcar_gen2_pci_probe()
228 setbits_le32(priv->cfg_base + RCAR_PCI_INT_ENABLE_REG, in rcar_gen2_pci_probe()
238 priv->cfg_base = devfdt_get_addr_index(dev, 0); in rcar_gen2_pci_of_to_plat()
[all …]
A Dpcie_xilinx.c20 void *cfg_base; member
44 uint32_t pscr = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_PSCR); in pcie_xilinx_link_up()
88 addr = pcie->cfg_base; in pcie_xilinx_config_address()
159 pcie->cfg_base = map_physmem(addr, size, MAP_NOCACHE); in pcie_xilinx_of_to_plat()
160 if (!pcie->cfg_base) in pcie_xilinx_of_to_plat()
175 writel(0, pcie->cfg_base + XILINX_PCIE_REG_INT_MASK); in pci_xilinx_probe()
178 rpsc = readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC); in pci_xilinx_probe()
180 writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC); in pci_xilinx_probe()
184 pcie->cfg_base + PCI_PRIMARY_BUS); in pci_xilinx_probe()
A Dpcie_ecam_synquacer.c182 phys_addr_t cfg_base; member
187 .cfg_base = SYNQUACER_PCI_SEG0_CONFIG_BASE,
191 .cfg_base = SYNQUACER_PCI_SEG1_CONFIG_BASE,
202 void *cfg_base; member
236 addr = pcie->cfg_base; in pci_synquacer_ecam_conf_address()
338 if (synquacer_pci_bases[i].cfg_base == reg_res.start) in pci_synquacer_ecam_of_to_plat()
361 pcie->cfg_base = map_physmem(reg_res.start, pcie->size, MAP_NOCACHE); in pci_synquacer_ecam_of_to_plat()
362 if (!pcie->cfg_base) { in pci_synquacer_ecam_of_to_plat()
509 (u64)pcie->cfg_base, in pci_synquacer_post_init()
517 (u64)pcie->cfg_base + SIZE_64KB, in pci_synquacer_post_init()
[all …]
A Dpcie_phytium.c21 void *cfg_base; member
89 addr = pcie->cfg_base; in pci_phytium_conf_address()
172 pcie->cfg_base = map_physmem(reg_res.start, in pci_phytium_of_to_plat()
A Dpcie_ecam_generic.c24 void *cfg_base; member
50 addr = pcie->cfg_base; in pci_generic_ecam_conf_address()
146 pcie->cfg_base = map_physmem(reg_res.start, pcie->size, MAP_NOCACHE); in pci_generic_ecam_of_to_plat()
A Dpcie_imx.c110 void __iomem *cfg_base; member
319 writel(lower_32_bits((uintptr_t)priv->cfg_base), in imx_pcie_regions_setup()
321 writel(upper_32_bits((uintptr_t)priv->cfg_base), in imx_pcie_regions_setup()
323 writel(lower_32_bits((uintptr_t)priv->cfg_base + MX6_ROOT_SIZE), in imx_pcie_regions_setup()
354 va_address = priv->cfg_base; in get_bus_address()
762 priv->cfg_base = devfdt_get_addr_index_ptr(dev, 1); in imx_pcie_of_to_plat()
763 if (!priv->dbi_base || !priv->cfg_base) in imx_pcie_of_to_plat()
A Dpcie_dw_common.c195 atu_type, (u64)pcie->cfg_base, in set_cfg_address()
200 va_address = (uintptr_t)pcie->cfg_base; in set_cfg_address()
417 if (!pci->cfg_base) { in pcie_dw_setup_host()
418 pci->cfg_base = (void *)(pci->io.phys_start - pci->io.size); in pcie_dw_setup_host()
427 (u64)pci->cfg_base, (u64)pci->cfg_base + pci->cfg_size, in pcie_dw_setup_host()
A Dpcie_dw_mvebu.c114 void *cfg_base; member
203 atu_type, (u64)pcie->cfg_base, in set_cfg_address()
205 va_address = (uintptr_t)pcie->cfg_base; in set_cfg_address()
573 pcie->cfg_base = devfdt_get_addr_size_index_ptr(dev, 1, in pcie_dw_mvebu_of_to_plat()
575 if (!pcie->cfg_base) in pcie_dw_mvebu_of_to_plat()
A Dpcie_starfive_jh7110.c67 (phys_addr_t)priv->plda.cfg_base, 0, in starfive_pcie_atr_init()
138 priv->plda.cfg_base = in starfive_pcie_parse_dt()
142 if (priv->plda.cfg_base == (void __iomem *)FDT_ADDR_T_NONE) { in starfive_pcie_parse_dt()
A Dpcie_uniphier.c83 void *cfg_base; member
164 PCIE_ATU_TYPE_CFG0, (u64)priv->cfg_base, in uniphier_pcie_conf_address()
166 *paddr = (void *)(priv->cfg_base + offset); in uniphier_pcie_conf_address()
303 priv->cfg_base = map_physmem(priv->cfg_res.start, in uniphier_pcie_probe()
A Dpcie_apple.c145 void __iomem *cfg_base; member
177 addr = pcie->cfg_base; in apple_pcie_config_address()
346 pcie->cfg_base = map_sysmem(addr, 0); in apple_pcie_probe()
A Dpcie_dw_rockchip.c382 priv->dw.cfg_base = dev_read_addr_size_index_ptr(dev, 2, in rockchip_pcie_parse_dt()
384 if (!priv->dw.cfg_base) in rockchip_pcie_parse_dt()
387 dev_dbg(dev, "CFG address is 0x%p\n", priv->dw.cfg_base); in rockchip_pcie_parse_dt()
A Dpcie_cdns_ti.c198 void __iomem *cfg_base; member
302 return pcie->cfg_base + (offset & 0xfff); in pcie_cdns_ti_map_bus()
614 u64 cpu_addr = (u64)pcie->cfg_base; in pcie_cdns_ti_init_address_translation()
793 pcie->cfg_base = dev_remap_addr_name(dev, "cfg"); in pcie_cdns_ti_of_to_plat()
794 if (!pcie->cfg_base) in pcie_cdns_ti_of_to_plat()
A Dpcie_dw_ti.c323 pcie->dw.cfg_base = (void *)dev_read_addr_size_name(dev, "config", in pcie_dw_ti_of_to_plat()
325 if ((fdt_addr_t)pcie->dw.cfg_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
A Dpcie_dw_imx.c270 priv->dw.cfg_base = (void *)dev_read_addr_size_name(dev, "config", in pcie_dw_imx_of_to_plat()
272 if ((fdt_addr_t)priv->dw.cfg_base == FDT_ADDR_T_NONE) { in pcie_dw_imx_of_to_plat()
A Dpcie_plda_common.h57 void __iomem *cfg_base; member
A Dpcie_plda_common.c44 *paddr = (void *)(priv->cfg_base + where); in plda_pcie_conf_address()
A Dpcie_dw_common.h124 void __iomem *cfg_base; member
A Dpci-rcar-gen4.c512 rcar->dw.cfg_base = (void *)dev_read_addr_size_name(dev, "config", in rcar_gen4_pcie_of_to_plat()
514 if ((fdt_addr_t)rcar->dw.cfg_base == FDT_ADDR_T_NONE) in rcar_gen4_pcie_of_to_plat()

Completed in 29 milliseconds