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Searched refs:con_offset (Results 1 – 3 of 3) sorted by relevance

/drivers/clk/rockchip/
A Dclk_pll.c319 rk_setreg(base + pll->con_offset + 0x4, in rk3036_pll_set_rate()
322 rk_clrsetreg(base + pll->con_offset, in rk3036_pll_set_rate()
327 rk_clrsetreg(base + pll->con_offset + 0x4, in rk3036_pll_set_rate()
339 base + pll->con_offset + 0x8); in rk3036_pll_set_rate()
343 rk_clrreg(base + pll->con_offset + 0x4, in rk3036_pll_set_rate()
356 pll, readl(base + pll->con_offset), in rk3036_pll_set_rate()
357 readl(base + pll->con_offset + 0x4), in rk3036_pll_set_rate()
386 con = readl(base + pll->con_offset); in rk3036_pll_get_rate()
480 rk_clrsetreg(base + pll->con_offset, in rk3588_pll_set_rate()
548 pll, readl(base + pll->con_offset), in rk3588_pll_set_rate()
[all …]
/drivers/clk/exynos/
A Dclk.h194 int con_offset; member
204 .con_offset = _con, \
A Dclk-pll.c113 pll->con_reg = base + pll_clk->con_offset; in _samsung_clk_register_pll()

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