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Searched refs:control (Results 1 – 25 of 117) sorted by relevance

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/drivers/pinctrl/renesas/
A DKconfig4 bool "Renesas pin control drivers"
8 Support pin multiplexing control on Renesas SoCs.
15 bool "Renesas pin control drivers (full size)"
26 bool "Renesas R-Car Gen2 R8A7790 pin control driver"
32 bool "Renesas R-Car Gen2 R8A7791 pin control driver"
38 bool "Renesas R-Car Gen2 R8A7792 pin control driver"
44 bool "Renesas R-Car Gen2 R8A7793 pin control driver"
50 bool "Renesas R-Car Gen2 R8A7794 pin control driver"
152 bool "Renesas RZ/A1 R7S72100 pin control driver"
159 bool "Renesas RZ/G2L family pin control driver"
[all …]
/drivers/spi/
A Dmicrochip_coreqspi.c124 u32 control; in mchp_coreqspi_init_hw() local
134 u32 control, data; in mchp_coreqspi_read_op() local
145 control |= CONTROL_FLAGSX4; in mchp_coreqspi_read_op()
157 control &= ~CONTROL_FLAGSX4; in mchp_coreqspi_read_op()
170 u32 control, data; in mchp_coreqspi_write_op() local
173 control |= CONTROL_FLAGSX4; in mchp_coreqspi_write_op()
185 control &= ~CONTROL_FLAGSX4; in mchp_coreqspi_write_op()
297 control |= CONTROL_MODE0; in mchp_coreqspi_set_operate_mode()
427 u32 control; in mchp_coreqspi_set_mode() local
432 control |= CONTROL_CLKIDLE; in mchp_coreqspi_set_mode()
[all …]
A Dadi_spi3.c231 u32 control; member
265 u32 control; member
317 iowrite32(0x0, &plat->regs->control); in adi_spi_probe()
337 __func__, priv->control, priv->clock); in adi_spi_claim_bus()
339 iowrite32(priv->control, &priv->regs->control); in adi_spi_claim_bus()
354 __func__, priv->control, priv->clock); in adi_spi_release_bus()
358 iowrite32(0x0, &priv->regs->control); in adi_spi_release_bus()
404 clrsetbits_32(&priv->regs->control, SPI_CTL_SOSI, mio_mode); in adi_spi_fifo_mio_xfer()
453 iowrite32(priv->control, &priv->regs->control); in adi_spi_fifo_1x_xfer()
573 priv->control = reg; in adi_spi_set_mode()
/drivers/pinctrl/mscc/
A DKconfig10 bool "Microsemi ocelot family pin control driver"
12 Support pin multiplexing and pin configuration control on
19 bool "Microsemi luton family pin control driver"
21 Support pin multiplexing and pin configuration control on
28 bool "Microsemi jr2 family pin control driver"
30 Support pin multiplexing and pin configuration control on
37 bool "Microsemi servalt family pin control driver"
39 Support pin multiplexing and pin configuration control on
46 bool "Microsemi serval family pin control driver"
48 Support pin multiplexing and pin configuration control on
/drivers/i2c/
A Dtegra_i2c.c38 struct i2c_control *control; member
156 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
161 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
174 writel(data, &i2c_bus->control->tx_fifo); in send_packet_headers()
236 struct i2c_control *control = i2c_bus->control; in send_recv_packets() local
246 int_status = readl(&control->int_status); in send_recv_packets()
247 writel(int_status, &control->int_status); in send_recv_packets()
269 writel(local, &control->tx_fifo); in send_recv_packets()
284 local = readl(&control->rx_fifo); in send_recv_packets()
404 i2c_bus->control = in tegra_i2c_probe()
[all …]
A Dmvtwsi.c62 u32 control; member
74 u32 control; member
276 int control, status; in twsi_wait() local
280 control = readl(&twsi->control); in twsi_wait()
281 if (control & MVTWSI_CONTROL_IFLG) { in twsi_wait()
351 &twsi->control); in twsi_send()
378 control = MVTWSI_CONTROL_TWSIEN; in twsi_recv()
380 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control); in twsi_recv()
402 int control, stop_status; in twsi_stop() local
408 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control); in twsi_stop()
[all …]
A Di2c-cdns.c27 u32 control; member
237 setbits_le32(&bus->regs->control, CDNS_I2C_CONTROL_MS | in cdns_i2c_set_bus_speed()
257 setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO); in cdns_i2c_write_data()
258 clrbits_le32(&regs->control, CDNS_I2C_CONTROL_RW); in cdns_i2c_write_data()
264 setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); in cdns_i2c_write_data()
288 clrbits_le32(&regs->control, in cdns_i2c_write_data()
299 clrbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); in cdns_i2c_write_data()
332 setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); in cdns_i2c_read_data()
334 setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO | in cdns_i2c_read_data()
355 clrbits_le32(&regs->control, in cdns_i2c_read_data()
[all …]
/drivers/pinctrl/mvebu/
A DKconfig5 bool "Armada 38x pin control driver"
7 Support pin multiplexing and pin configuration control on
12 bool "Armada 37xx pin control driver"
14 Support pin multiplexing and pin configuration control on
19 bool "Armada 7k/8k pin control driver"
21 Support pin multiplexing and pin configuration control on
/drivers/net/
A Dxilinx_axi_mrmac.c126 writel(XMCDMA_CR_RESET, &priv->mm2s_cmn->control); in axi_mcdma_init()
127 writel(XMCDMA_CR_RESET, &priv->s2mm_cmn->control); in axi_mcdma_init()
179 clrbits_le32(&priv->mcdma_rx->control, XMCDMA_IRQ_ALL_MASK); in axi_mrmac_start()
213 setbits_le32(&priv->s2mm_cmn->control, XMCDMA_CR_RUNSTOP_MASK); in axi_mrmac_start()
214 setbits_le32(&priv->mm2s_cmn->control, XMCDMA_CR_RUNSTOP_MASK); in axi_mrmac_start()
215 setbits_le32(&priv->mcdma_rx->control, XMCDMA_IRQ_ALL_MASK); in axi_mrmac_start()
218 setbits_le32(&priv->mcdma_rx->control, XMCDMA_CR_RUNSTOP_MASK); in axi_mrmac_start()
303 setbits_le32(&priv->mcdma_tx->control, XMCDMA_IRQ_ALL_MASK); in axi_mrmac_send()
370 clrbits_le32(&priv->mcdma_rx->control, XMCDMA_IRQ_ALL_MASK); in axi_mrmac_recv()
419 clrbits_le32(&priv->mcdma_rx->control, XMCDMA_IRQ_ALL_MASK); in axi_mrmac_free_pkt()
[all …]
A Dxilinx_axi_emac.c99 u32 control; /* DMACR */ member
466 temp = readl(&priv->dmatx->control); in axiemac_stop()
468 writel(temp, &priv->dmatx->control); in axiemac_stop()
470 temp = readl(&priv->dmarx->control); in axiemac_stop()
472 writel(temp, &priv->dmarx->control); in axiemac_stop()
572 readl(&priv->dmarx->control)) in axi_dma_init()
605 temp = readl(&priv->dmarx->control); in axiemac_start()
607 writel(temp, &priv->dmarx->control); in axiemac_start()
629 temp = readl(&priv->dmarx->control); in axiemac_start()
631 writel(temp, &priv->dmarx->control); in axiemac_start()
[all …]
/drivers/ram/
A Dstm32_sdram.c167 struct stm32_sdram_control *control; in stm32_sdram_init() local
180 control = params->bank_params[i].sdram_control; in stm32_sdram_init()
185 writel(control->sdclk << FMC_SDCR_SDCLK_SHIFT in stm32_sdram_init()
186 | control->cas_latency << FMC_SDCR_CAS_SHIFT in stm32_sdram_init()
187 | control->no_banks << FMC_SDCR_NB_SHIFT in stm32_sdram_init()
189 | control->no_rows << FMC_SDCR_NR_SHIFT in stm32_sdram_init()
190 | control->no_columns << FMC_SDCR_NC_SHIFT in stm32_sdram_init()
192 | control->rd_burst << FMC_SDCR_RBURST_SHIFT, in stm32_sdram_init()
197 | control->no_banks << FMC_SDCR_NB_SHIFT in stm32_sdram_init()
199 | control->no_rows << FMC_SDCR_NR_SHIFT in stm32_sdram_init()
[all …]
/drivers/pinctrl/mtmips/
A DKconfig7 bool "MediaTek MT7620 pin control driver"
11 Support pin multiplexing control on MediaTek MT7620.
16 bool "MediaTek MT7621 pin control driver"
20 Support pin multiplexing control on MediaTek MT7621.
25 bool "MediaTek MT7628 pin control driver"
29 Support pin multiplexing control on MediaTek MT7628.
/drivers/misc/
A Dqfw_sandbox.c50 u32 control = be32_to_cpu(dma->control); in qfw_sandbox_read_entry_dma() local
58 if (!(control & FW_CFG_DMA_READ)) in qfw_sandbox_read_entry_dma()
61 if (control & FW_CFG_DMA_SELECT) { in qfw_sandbox_read_entry_dma()
63 entry = control >> 16; in qfw_sandbox_read_entry_dma()
104 dma->control = 0; in qfw_sandbox_read_entry_dma()
/drivers/serial/
A Dserial_xuartlite.c31 unsigned int control; member
95 uart_out32(&regs->control, 0); in uartlite_serial_probe()
96 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); in uartlite_serial_probe()
101 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | in uartlite_serial_probe()
148 uart_out32(&regs->control, 0); in _debug_uart_init()
149 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); in _debug_uart_init()
154 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | in _debug_uart_init()
A Dserial_meson.c18 u32 control; member
80 val = readl(&uart->control); in meson_serial_init()
82 writel(val, &uart->control); in meson_serial_init()
84 writel(val, &uart->control); in meson_serial_init()
86 writel(val, &uart->control); in meson_serial_init()
110 u32 val = readl(&uart->control); in meson_serial_rx_error()
114 writel(val, &uart->control); in meson_serial_rx_error()
116 writel(val, &uart->control); in meson_serial_rx_error()
A Daltera_jtag_uart.c25 u32 control; /* Control register */ member
41 u32 st = readl(&regs->control); in altera_jtaguart_putc()
60 u32 st = readl(&regs->control); in altera_jtaguart_pending()
88 writel(ALTERA_JTAG_AC, &regs->control); /* clear AC flag */ in altera_jtaguart_probe()
139 u32 st = readl(&regs->control); in _debug_uart_putc()
A Dserial_sti_asc.c33 u32 control; member
110 val = readl(&uart->control); in _sti_asc_serial_setbrg()
111 writel(val & ~RUN, &uart->control); in _sti_asc_serial_setbrg()
124 writel(val, &uart->control); in _sti_asc_serial_setbrg()
186 writel(val, &priv->regs->control); in sti_asc_serial_probe()
/drivers/pinctrl/broadcom/
A DKconfig4 bool "Broadcom 283x family pin control driver"
6 Support pin multiplexing and pin configuration control on
12 bool "Broadcom 6838 family pin control driver"
14 Support pin multiplexing and pin configuration control on
/drivers/pinctrl/
A DKconfig190 bool "QCA/Athores ar933x pin control driver"
222 bool "Standard Intel pin-control and pin-mux driver"
230 bool "Microchip PIC32 pin-control and pin-mux driver"
240 bool "QCA/Athores qca953x pin control driver"
257 bool "Rockchip rv1108 pin control driver"
316 bool "ST STM32 pin control driver"
319 Supports pin multiplexing control on stm32 SoCs.
331 Supports pin multiplexing control on stm32 SoCs.
353 bool "Aspeed AST2500 pin control driver"
362 bool "Aspeed AST2600 pin control driver"
[all …]
/drivers/timer/
A Daltera_timer.c23 u32 control; /* Timer control reg */ member
55 writel(0, &regs->control); in altera_timer_probe()
56 writel(ALTERA_TIMER_STOP, &regs->control); in altera_timer_probe()
60 writel(ALTERA_TIMER_CONT | ALTERA_TIMER_START, &regs->control); in altera_timer_probe()
/drivers/usb/host/
A Dehci-fsl.c40 if (!((in_be32(&ehci->control) & PHY_CLK_VALID) || in usb_phy_clk_valid()
185 clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK, in ehci_fsl_init()
187 clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK, in ehci_fsl_init()
192 clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK, in ehci_fsl_init()
195 clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK, in ehci_fsl_init()
197 clrsetbits_be32(&ehci->control, UTMI_PHY_EN | in ehci_fsl_init()
/drivers/cache/
A Dcache-andes-l2.c18 volatile u64 control; member
89 setbits_le32(&regs->control, L2_ENABLE); in andes_l2_enable()
103 if ((regs) && (readl(&regs->control) & L2_ENABLE)) { in andes_l2_disable()
112 clrbits_le32(&regs->control, L2_ENABLE); in andes_l2_disable()
149 ctl_val = readl(&regs->control); in andes_l2_probe()
182 writel(ctl_val, &regs->control); in andes_l2_probe()
/drivers/reboot-mode/
A DKconfig13 Enable support for reboot mode control. This will allow users to
21 Use GPIOs to control the reboot mode. This will allow users to boot
30 Use RTC non volatile memory to control the reboot mode. This will allow users to boot
38 Use any kind of non-volatile memory (EEPROM, RTC, etc) to control the
/drivers/pinctrl/exynos/
A DKconfig9 Support pin multiplexing and pin configuration control on
17 Support pin multiplexing and pin configuration control on
25 Support pin multiplexing and pin configuration control on
/drivers/rtc/
A Dds1337.c75 uchar sec, min, hour, mday, wday, mon_cent, year, control, status; in rtc_get() local
77 control = rtc_read (RTC_CTL_REG_ADDR); in rtc_get()
94 year, mon_cent, mday, wday, hour, min, sec, control, status); in rtc_get()
204 uchar sec, min, hour, mday, wday, mon_cent, year, control, status; in ds1337_rtc_get() local
206 control = rtc_read(dev, RTC_CTL_REG_ADDR); in ds1337_rtc_get()
224 hour, min, sec, control, status); in ds1337_rtc_get()

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