| /drivers/remoteproc/ |
| A D | ti_k3_dsp_rproc.c | 37 void __iomem *cpu_addr; member
294 dsp->cached_addr = dsp->mem[i].cpu_addr + offset; in k3_dsp_da_to_va()
299 dsp->cached_addr = dsp->mem[i].cpu_addr + offset; in k3_dsp_da_to_va()
372 dsp->mem[i].cpu_addr = NULL; in k3_dsp_of_get_memories()
380 dsp->mem[i].cpu_addr = NULL; in k3_dsp_of_get_memories()
390 dsp->mem[i].cpu_addr = map_physmem(dsp->mem[i].bus_addr, in k3_dsp_of_get_memories()
398 dsp->mem[i].size, dsp->mem[i].cpu_addr, in k3_dsp_of_get_memories()
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| A D | ti_k3_m4_rproc.c | 33 void __iomem *cpu_addr; member
203 va = m4->mem[i].cpu_addr + offset; in k3_m4_da_to_va()
209 va = m4->mem[i].cpu_addr + offset; in k3_m4_da_to_va()
279 m4->mem[i].cpu_addr = map_physmem(m4->mem[i].bus_addr, in k3_m4_of_get_memories()
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| A D | ti_k3_r5f_rproc.c | 82 void __iomem *cpu_addr; member
290 memset(core->mem[0].cpu_addr, 0x00, core->mem[0].size); in k3_r5f_init_tcm_memories()
292 memset(core->mem[1].cpu_addr, 0x00, core->mem[1].size); in k3_r5f_init_tcm_memories()
551 va = core->mem[i].cpu_addr + offset; in k3_r5f_da_to_va()
557 va = core->mem[i].cpu_addr + offset; in k3_r5f_da_to_va()
734 core->mem[i].cpu_addr = map_physmem(core->mem[i].bus_addr, in k3_r5f_core_of_get_memories()
747 core->mem[i].size, core->mem[i].cpu_addr, in k3_r5f_core_of_get_memories()
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| A D | ipu_rproc.c | 106 void __iomem *cpu_addr; member
718 priv->mem.cpu_addr = map_physmem(priv->mem.bus_addr, in ipu_probe()
737 priv->mem.size, priv->mem.cpu_addr, priv->mem.dev_addr); in ipu_probe()
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| /drivers/pci/ |
| A D | pcie_cdns_ti.c | 509 u8 fn, u32 r, bool is_io, u64 cpu_addr, in pcie_cdns_ti_set_outbound_region() argument
540 (lower_32_bits(cpu_addr) & GENMASK(31, 8)); in pcie_cdns_ti_set_outbound_region()
541 addr1 = upper_32_bits(cpu_addr); in pcie_cdns_ti_set_outbound_region()
549 u64 cpu_addr, u64 size, in pcie_cdns_ti_bar_ib_config() argument
561 (lower_32_bits(cpu_addr) & GENMASK(31, 8)); in pcie_cdns_ti_bar_ib_config()
562 addr1 = upper_32_bits(cpu_addr); in pcie_cdns_ti_bar_ib_config()
575 if (size + cpu_addr >= SZ_4G) { in pcie_cdns_ti_bar_ib_config()
614 u64 cpu_addr = (u64)pcie->cfg_base; in pcie_cdns_ti_init_address_translation() local
628 (lower_32_bits(cpu_addr) & GENMASK(31, 8)); in pcie_cdns_ti_init_address_translation()
629 addr1 = upper_32_bits(cpu_addr); in pcie_cdns_ti_init_address_translation()
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| A D | pcie_dw_common.c | 106 int type, u64 cpu_addr, in pcie_dw_prog_outbound_atu_unroll() argument
112 index, type, cpu_addr, pci_addr, size); in pcie_dw_prog_outbound_atu_unroll()
115 lower_32_bits(cpu_addr)); in pcie_dw_prog_outbound_atu_unroll()
117 upper_32_bits(cpu_addr)); in pcie_dw_prog_outbound_atu_unroll()
119 lower_32_bits(cpu_addr + size - 1)); in pcie_dw_prog_outbound_atu_unroll()
121 upper_32_bits(cpu_addr + size - 1)); in pcie_dw_prog_outbound_atu_unroll()
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| A D | pcie_mediatek_gen3.c | 175 u64 cpu_addr, u64 pci_addr, u64 size, in mtk_pcie_set_trans_table() argument
183 (unsigned long long)cpu_addr, PCIE_MAX_TRANS_TABLES); in mtk_pcie_set_trans_table()
187 dev_dbg(dev, "set trans table %d: %#llx %#llx, %#llx\n", num, cpu_addr, in mtk_pcie_set_trans_table()
192 writel(lower_32_bits(cpu_addr) | PCIE_ATR_SIZE(fls(size) - 1), table); in mtk_pcie_set_trans_table()
193 writel(upper_32_bits(cpu_addr), table + PCIE_ATR_SRC_ADDR_MSB_OFFSET); in mtk_pcie_set_trans_table()
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| A D | pcie_dw_mvebu.c | 147 int type, u64 cpu_addr, u64 pci_addr, in pcie_dw_prog_outbound_atu() argument
152 writel(lower_32_bits(cpu_addr), pcie->ctrl_base + PCIE_ATU_LOWER_BASE); in pcie_dw_prog_outbound_atu()
153 writel(upper_32_bits(cpu_addr), pcie->ctrl_base + PCIE_ATU_UPPER_BASE); in pcie_dw_prog_outbound_atu()
154 writel(lower_32_bits(cpu_addr + size - 1), in pcie_dw_prog_outbound_atu()
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| A D | pcie_uniphier.c | 112 int index, int type, u64 cpu_addr, in pcie_dw_prog_outbound_atu() argument
118 writel(lower_32_bits(cpu_addr), in pcie_dw_prog_outbound_atu()
120 writel(upper_32_bits(cpu_addr), in pcie_dw_prog_outbound_atu()
122 writel(lower_32_bits(cpu_addr + size - 1), in pcie_dw_prog_outbound_atu()
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| A D | pcie_dw_common.h | 142 int pcie_dw_prog_outbound_atu_unroll(struct pcie_dw *pci, int index, int type, u64 cpu_addr,
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| /drivers/soc/ti/ |
| A D | k3-navss-ringacc.c | 30 #define dma_free_coherent(dev, size, cpu_addr, dma_handle) \ argument
31 dma_free_coherent(cpu_addr)
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