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Searched refs:cpu_freq (Results 1 – 16 of 16) sorted by relevance

/drivers/ddr/marvell/axp/
A Dddr3_init.c311 switch (cpu_freq) { in print_ddr_target_freq()
408 cpu_freq = ddr3_get_cpu_freq(); in ddr3_init_main()
413 print_ddr_target_freq(cpu_freq, fab_opt); in ddr3_init_main()
426 DEBUG_INIT_C("cpu_freq", cpu_freq, 2); in ddr3_init_main()
430 DEBUG_INIT_C("cpu_freq", cpu_freq, 2); in ddr3_init_main()
697 u32 reg, cpu_freq; in ddr3_get_cpu_freq() local
718 return cpu_freq; in ddr3_get_cpu_freq()
758 u32 fab, cpu_freq, ui_vco_freq; in ddr3_get_vco_freq() local
761 cpu_freq = ddr3_get_cpu_freq(); in ddr3_get_vco_freq()
765 ui_vco_freq = cpu_freq + CLK_CPU; in ddr3_get_vco_freq()
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A Dddr3_dfs.c127 u32 cpu_freq = ddr3_get_cpu_freq(); in ddr3_dfs_high_2_low() local
128 get_target_freq(cpu_freq, &tmp, &hclk); in ddr3_dfs_high_2_low()
783 u32 cpu_freq = ddr3_get_cpu_freq(); in ddr3_dfs_low_2_high() local
784 get_target_freq(cpu_freq, &tmp, &hclk); in ddr3_dfs_low_2_high()
A Dddr3_hw_training.h307 u8 cpu_freq; member
/drivers/cpu/
A Dmicroblaze_cpu.c64 ci->cpu_freq = dev_read_u32_default(dev, "clock-frequency", 0); in microblaze_set_cpuinfo_static()
92 cpu_freq_mhz = ci->cpu_freq / 1000000; in microblaze_cpu_get_desc()
110 info->cpu_freq = ci->cpu_freq; in microblaze_cpu_get_info()
A Driscv_cpu.c47 info->cpu_freq = ret; in riscv_cpu_get_info()
50 if (!info->cpu_freq) in riscv_cpu_get_info()
51 dev_read_u32(dev, "clock-frequency", (u32 *)&info->cpu_freq); in riscv_cpu_get_info()
A Dcpu_sandbox.c20 info->cpu_freq = 42 * 42 * 42 * 42 * 42; in cpu_sandbox_get_info()
A Dxtensa_cpu.c31 info->cpu_freq = plat->timebase_freq; in xtensa_cpu_get_info()
A Dat91_cpu.c45 info->cpu_freq = plat->cpufreq_mhz * 1000000; in at91_cpu_get_info()
A Darmv8_cpu.c30 info->cpu_freq = 0; in armv8_cpu_get_info()
A Dbmips_cpu.c395 info->cpu_freq = hw->get_cpu_freq(priv); in bmips_cpu_get_info()
518 print_freq(cpu.cpu_freq, "\n"); in print_cpuinfo()
A Dbcm283x_cpu.c53 info->cpu_freq = plat->timebase_freq * 1000; in cpu_bcm_get_info()
A Dmpc83xx_cpu.c300 info->cpu_freq = freq; in mpc83xx_cpu_get_info()
A Dimx8_cpu.c262 info->cpu_freq = plat->freq_mhz * 1000000; in cpu_imx_get_info()
/drivers/clk/aspeed/
A Dclk_ast2600.c143 uint32_t cpu_freq; in ast2600_get_pll_rate() local
177 cpu_freq = (hwstrap1 & SCU_HWSTRAP1_CPU_FREQ_MASK) >> in ast2600_get_pll_rate()
180 switch (cpu_freq) { in ast2600_get_pll_rate()
209 uint32_t cpu_freq = (hwstrap1 & SCU_HWSTRAP1_CPU_FREQ_MASK) >> in ast2600_get_hclk_rate() local
215 axi_ahb_div1_table[0] = axi_ahb_default_table[cpu_freq] * 2; in ast2600_get_hclk_rate()
219 axi_ahb_div0_table[0] = axi_ahb_default_table[cpu_freq]; in ast2600_get_hclk_rate()
/drivers/ddr/marvell/a38x/
A Dmv_ddr_plat.c857 u32 cpu_freq; in ddr3_tip_a38x_set_divider() local
875 cpu_freq = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val]; in ddr3_tip_a38x_set_divider()
877 cpu_freq = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val]; in ddr3_tip_a38x_set_divider()
879 divider = cpu_freq / ddr_freq; in ddr3_tip_a38x_set_divider()
881 if (((cpu_freq % ddr_freq != 0) || (divider != 2 && divider != 3)) && in ddr3_tip_a38x_set_divider()
/drivers/ddr/marvell/a38x/old/
A Dddr3_init.c54 u8 cpu_freq; member
499 if ((ddr3_get_cpu_freq() == ddr_modes[i].cpu_freq) && in ddr3_get_static_ddr_mode()

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