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Searched refs:ctrl_reg (Results 1 – 16 of 16) sorted by relevance

/drivers/mmc/
A Dmvebu_mmc.c48 u32 ctrl_reg; in mvebu_mmc_setup_data() local
55 ctrl_reg = mvebu_mmc_read(mmc, SDIO_HOST_CTRL); in mvebu_mmc_setup_data()
57 mvebu_mmc_write(mmc, SDIO_HOST_CTRL, ctrl_reg); in mvebu_mmc_setup_data()
294 u32 ctrl_reg = 0; in mvebu_mmc_set_bus() local
305 ctrl_reg |= SDIO_HOST_CTRL_DATA_WIDTH_1_BIT; in mvebu_mmc_set_bus()
309 ctrl_reg |= SDIO_HOST_CTRL_BIG_ENDIAN; in mvebu_mmc_set_bus()
310 ctrl_reg &= ~SDIO_HOST_CTRL_LSB_FIRST; in mvebu_mmc_set_bus()
314 ctrl_reg |= SDIO_HOST_CTRL_TMOUT_EN; in mvebu_mmc_set_bus()
316 ctrl_reg |= SDIO_HOST_CTRL_PUSH_PULL_EN; in mvebu_mmc_set_bus()
321 (ctrl_reg & SDIO_HOST_CTRL_PUSH_PULL_EN) ? in mvebu_mmc_set_bus()
[all …]
/drivers/power/regulator/
A Dpalmas_regulator.c55 adr = uc_pdata->ctrl_reg; in palmas_smps_enable()
179 adr = p->ctrl_reg; in palmas_ldo_bypass_enable()
200 adr = uc_pdata->ctrl_reg; in palmas_ldo_enable()
305 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][9]; in palmas_ldo_probe()
311 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][10]; in palmas_ldo_probe()
318 uc_pdata->ctrl_reg = palmas_ldo_ctrl[type][idx]; in palmas_ldo_probe()
378 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][0]; in palmas_smps_probe()
382 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][1]; in palmas_smps_probe()
386 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][2]; in palmas_smps_probe()
395 uc_pdata->ctrl_reg = palmas_smps_ctrl[type][idx]; in palmas_smps_probe()
[all …]
A Das3722_regulator.c73 u8 ctrl_reg = AS3722_LDO_CONTROL0; in ldo_set_enable() local
78 ctrl_reg = AS3722_LDO_CONTROL1; in ldo_set_enable()
82 ret = pmic_clrsetbits(pmic, ctrl_reg, !enable << ldo, enable << ldo); in ldo_set_enable()
95 u8 ctrl_reg = AS3722_LDO_CONTROL0; in ldo_get_enable() local
100 ctrl_reg = AS3722_LDO_CONTROL1; in ldo_get_enable()
104 ret = pmic_reg_read(pmic, ctrl_reg); in ldo_get_enable()
A Dmax8907_regulator.c29 val = pmic_reg_read(dev->parent, uc_pdata->ctrl_reg); in max8907_enable()
40 uc_pdata->ctrl_reg, in max8907_enable()
47 uc_pdata->ctrl_reg, in max8907_enable()
217 uc_pdata->ctrl_reg = max8907_regmap[idx]; in max8907_sd_probe()
218 uc_pdata->volt_reg = uc_pdata->ctrl_reg + MAX8907_VOUT; in max8907_sd_probe()
238 uc_pdata->ctrl_reg = max8907_regmap[idx]; in max8907_ldo_probe()
239 uc_pdata->volt_reg = uc_pdata->ctrl_reg + MAX8907_VOUT; in max8907_ldo_probe()
A Dtps65911_regulator.c29 u32 adr = uc_pdata->ctrl_reg; in tps65911_regulator_enable()
188 uc_pdata->ctrl_reg = tps65911_vdd_reg[0][2]; in tps65911_vdd_probe()
194 uc_pdata->ctrl_reg = tps65911_vdd_reg[0][3]; in tps65911_vdd_probe()
202 uc_pdata->ctrl_reg = tps65911_vdd_reg[0][idx]; in tps65911_vdd_probe()
325 u32 adr = uc_pdata->ctrl_reg; in tps65911_ldo_val()
361 uc_pdata->ctrl_reg = tps65911_ldo_reg[idx]; in tps65911_ldo_probe()
A Dtps80031_regulator.c26 u32 adr = uc_pdata->ctrl_reg; in tps80031_regulator_enable()
149 uc_pdata->ctrl_reg = tps80031_ldo_reg[CTRL][7]; in tps80031_ldo_probe()
155 uc_pdata->ctrl_reg = tps80031_ldo_reg[CTRL][8]; in tps80031_ldo_probe()
163 uc_pdata->ctrl_reg = tps80031_ldo_reg[CTRL][idx]; in tps80031_ldo_probe()
306 uc_pdata->ctrl_reg = tps80031_smps_reg[CTRL][idx]; in tps80031_smps_probe()
A Dmax77663_regulator.c25 u32 adr = uc_pdata->ctrl_reg; in max77663_sd_enable()
161 uc_pdata->ctrl_reg = max77663_sd_reg[0][idx]; in max77663_sd_probe()
219 u32 adr = uc_pdata->ctrl_reg; in max77663_ldo_enable()
289 u32 adr = uc_pdata->ctrl_reg; in max77663_ldo_val()
324 uc_pdata->ctrl_reg = max77663_ldo_reg[idx]; in max77663_ldo_probe()
A Dlp873x_regulator.c28 adr = uc_pdata->ctrl_reg; in lp873x_buck_enable()
130 adr = uc_pdata->ctrl_reg; in lp873x_ldo_enable()
231 uc_pdata->ctrl_reg = lp873x_ldo_ctrl[idx]; in lp873x_ldo_probe()
285 uc_pdata->ctrl_reg = lp873x_buck_ctrl[idx]; in lp873x_buck_probe()
A Dtps65219_regulator.c68 adr = uc_pdata->ctrl_reg; in tps65219_buck_enable()
146 adr = uc_pdata->ctrl_reg; in tps65219_ldo_enable()
257 uc_pdata->ctrl_reg = TPS65219_ENABLE_CTRL_REG; in tps65219_ldo_probe()
278 uc_pdata->ctrl_reg = TPS65219_ENABLE_CTRL_REG; in tps65219_buck_probe()
A Dtps65941_regulator.c71 adr = uc_pdata->ctrl_reg; in tps65941_buck_enable()
331 slew = pmic_reg_read(dev->parent, uc_pdata->ctrl_reg + 1); in tps65941_buck_val()
363 adr = uc_pdata->ctrl_reg; in tps65941_ldo_enable()
580 uc_pdata->ctrl_reg = tps65941_ldo_ctrl[idx - 1]; in tps65941_ldo_probe()
638 uc_pdata->ctrl_reg = tps65941_buck_ctrl[idx - 1]; in tps65941_buck_probe()
A Dlp87565_regulator.c27 adr = uc_pdata->ctrl_reg; in lp87565_buck_enable()
142 uc_pdata->ctrl_reg = lp87565_buck_ctrl1[idx]; in lp87565_buck_probe()
/drivers/pinctrl/aspeed/
A Dpinctrl_ast2500.c88 u32 *ctrl_reg; in ast2500_pinctrl_group_set() local
96 ctrl_reg = &priv->scu->pinmux_ctrl1[config->reg_num - 7]; in ast2500_pinctrl_group_set()
98 ctrl_reg = &priv->scu->pinmux_ctrl[config->reg_num - 1]; in ast2500_pinctrl_group_set()
101 setbits_le32(ctrl_reg, config->ctrl_bit_mask); in ast2500_pinctrl_group_set()
A Dpinctrl_ast2600.c578 u32 ctrl_reg = (u32)priv->scu; in ast2600_pinctrl_group_set() local
589 clrbits_le32((u32)ctrl_reg + descs->offset, descs->reg_set); in ast2600_pinctrl_group_set()
591 setbits_le32((u32)ctrl_reg + descs->offset, descs->reg_set); in ast2600_pinctrl_group_set()
/drivers/spi/
A Dmxc_spi.c114 u32 ctrl_reg; member
185 unsigned int ctrl_reg; in spi_cfg_mxc() local
199 ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | in spi_cfg_mxc()
206 ctrl_reg |= MXC_CSPICTRL_PHA; in spi_cfg_mxc()
208 ctrl_reg |= MXC_CSPICTRL_POL; in spi_cfg_mxc()
210 ctrl_reg |= MXC_CSPICTRL_SSPOL; in spi_cfg_mxc()
211 mxcs->ctrl_reg = ctrl_reg; in spi_cfg_mxc()
299 mxcs->ctrl_reg = reg_ctrl; in spi_cfg_mxc()
322 mxcs->ctrl_reg = (mxcs->ctrl_reg & in spi_xchg_single()
326 reg_write(&regs->ctrl, mxcs->ctrl_reg | MXC_CSPICTRL_EN); in spi_xchg_single()
[all …]
/drivers/i2c/
A Dsun6i_p2wi.c85 u8 slave_addr, u8 ctrl_reg, in sun6i_p2wi_change_to_p2wi_mode() argument
91 P2WI_PM_CTRL_ADDR(ctrl_reg) | in sun6i_p2wi_change_to_p2wi_mode()
128 int p2wi_change_to_p2wi_mode(u8 slave_addr, u8 ctrl_reg, u8 init_data) in p2wi_change_to_p2wi_mode() argument
132 return sun6i_p2wi_change_to_p2wi_mode(base, slave_addr, ctrl_reg, in p2wi_change_to_p2wi_mode()
/drivers/net/
A Dxilinx_emaclite.c197 u32 ctrl_reg = __raw_readl(&regs->mdioctrl); in phyread() local
201 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl); in phyread()
225 u32 ctrl_reg = __raw_readl(&regs->mdioctrl); in phywrite() local
230 __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl); in phywrite()

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