Searched refs:ddr_ctrl_base (Results 1 – 2 of 2) sorted by relevance
| /drivers/ram/cadence/ |
| A D | ddr_ctrl.c | 308 u32 *ddr_ctrl_base = (u32 *)ddr_ctrl_basex; in cdns_ddr_ctrl_init() local
311 ddrc_writel(*reg0, ddr_ctrl_base + 0); in cdns_ddr_ctrl_init()
314 ddrc_writel(*(reg0 + i), ddr_ctrl_base + i); in cdns_ddr_ctrl_init()
317 ddrc_writel(*(reg0 + i), ddr_ctrl_base + i); in cdns_ddr_ctrl_init()
355 cdns_ddr_set_port_rw_priority(ddr_ctrl_base, axi, 2, 2); in cdns_ddr_ctrl_init()
358 cdns_ddr_set_port_bandwidth(ddr_ctrl_base, axi, 50, 1); in cdns_ddr_ctrl_init()
366 cdns_ddr_enable_addr_range(ddr_ctrl_base, entry, in cdns_ddr_ctrl_init()
370 ddrc_writel(*(reg350 - 350 + i), ddr_ctrl_base + i); in cdns_ddr_ctrl_init()
387 cdns_ddr_enable_addr_range(ddr_ctrl_base, 0, in cdns_ddr_ctrl_init()
395 u32 *ddr_ctrl_base = (u32 *)ddr_ctrl_basex; in cdns_ddr_ctrl_start() local
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| /drivers/ram/renesas/rzn1/ |
| A D | ddr_async.c | 169 static void rzn1_ddr3_single_bank(void *ddr_ctrl_base) in rzn1_ddr3_single_bank() argument
172 cdns_ddr_set_mr1(ddr_ctrl_base, 0, in rzn1_ddr3_single_bank()
175 cdns_ddr_set_mr2(ddr_ctrl_base, 0, in rzn1_ddr3_single_bank()
180 cdns_ddr_set_odt_map(ddr_ctrl_base, 0, 0x0100); in rzn1_ddr3_single_bank()
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