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Searched refs:debug (Results 1 – 25 of 911) sorted by relevance

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/drivers/ddr/altera/
A Dsdram_gen5.c267 debug(" Read and verify..."); in sdram_write_verify()
275 debug("correct!\n"); in sdram_write_verify()
350 debug("\nConfiguring CTRLCFG\n"); in sdr_load_regs()
368 debug("Configuring DRAMADDRW\n"); in sdr_load_regs()
377 debug("Configuring LOWPWREQ\n"); in sdr_load_regs()
380 debug("Configuring DRAMINTR\n"); in sdr_load_regs()
383 debug("Configuring STATICCFG\n"); in sdr_load_regs()
386 debug("Configuring CTRLWIDTH\n"); in sdr_load_regs()
389 debug("Configuring PORTCFG\n"); in sdr_load_regs()
392 debug("Configuring FIFOCFG\n"); in sdr_load_regs()
[all …]
A Dsdram_n5x.c497 debug("is set\n"); in ensure_retry_procedure_complete()
543 debug(" controller idle\n"); in enable_quasi_dynamic_reg_grp3()
784 debug("rd = 0x%08x ", in handoff_process()
791 debug("rd = 0x%08x ", in handoff_process()
921 debug(" programming done\n"); in phy_pre_handoff_config()
1168 debug(" section\n"); in populate_ddr_handoff()
1245 debug(" programming done\n"); in ddr_start_dfi_init()
1263 debug(" DFI init done\n"); in ddr_check_dfi_init_complete()
1290 debug(" programming done\n"); in ddr_check_dfi_init_complete()
1328 debug(" programming done\n"); in ddr_trigger_sdram_init()
[all …]
A Duibssm_mailbox.c110 debug("%s: Initial HBM calibration UIB_%d succeed\n", __func__, i); in uib_init_mem_cal()
141 debug("%s: HBM re-calibration UIB_%d succeed\n", __func__, i); in uib_trig_mem_cal()
165 debug("%s: #1 Read MBWRADDR_VALID from UIB_R_MBWRCTL\n", __func__); in uib_mailbox_write_request()
189 debug("%s: #4 Read MBWRDATA_VALID from UIB_R_MBWRCTL\n", __func__); in uib_mailbox_write_request()
212 debug("%s: #6 Write 0x%x to UIB_R_MBWRDATA\n", __func__, data); in uib_mailbox_write_request()
237 debug("%s: #1 Read MBRDADDR_VALID from UIB_R_MBRDCTL\n", __func__); in uib_mailbox_read_request()
262 debug("%s: #4 Read MBRDDATA_VALID from UIB_R_MBRDCTL\n", __func__); in uib_mailbox_read_request()
308 debug("%s: cmd_param_0 is NULL\n", __func__); in uib_mb_req()
313 debug("%s: CMD_RESPONSE_STATUS 0x%llx: 0x%x\n", __func__, in uib_mb_req()
315 debug("%s: STATUS_CMD_RESPONSE_ERROR: 0x%lx\n", __func__, in uib_mb_req()
[all …]
A Dsdram_agilex7m.c70 debug("%s: 0x%x\n", __func__, reg); in is_ddr_init_hang()
122 debug("%s: MPFE-EMIF is in %s mode\n", __func__, in populate_ddr_handoff()
131 debug("%s: Memory type is %s\n", __func__ in populate_ddr_handoff()
139 debug("%s: UIB 0x%llx CSR enabled\n", __func__ in populate_ddr_handoff()
165 debug("%s: IO96B 0x%llx CSR enabled\n", __func__, in populate_ddr_handoff()
198 debug("%s: Interleaving bit is set\n", __func__); in config_mpfe_sideband_mgr()
200 debug("%s: Multichannel bit is set\n", __func__); in config_mpfe_sideband_mgr()
243 debug("DDR: Populating DDR handoff\n"); in sdram_mmr_init_full()
342 debug("HBM: Setting Error Mask Register\n"); in sdram_mmr_init_full()
351 debug("HBM: Error Mask Pseudo CH0 addr: 0x%llx\n", in sdram_mmr_init_full()
[all …]
/drivers/ddr/fsl/
A Dmpc85xx_ddr_gen3.c183 if (regs->debug[i]) { in fsl_ddr_set_memctl_regs()
184 debug("Write to debug_%d as %08x\n", i+1, regs->debug[i]); in fsl_ddr_set_memctl_regs()
185 out_be32(&ddr->debug[i], regs->debug[i]); in fsl_ddr_set_memctl_regs()
425 debug("Setting DEBUG_3[21] to 0x%08x\n", in_be32(&ddr->debug[2])); in fsl_ddr_set_memctl_regs()
501 debug("Clearing D3[21] to 0x%08x\n", in_be32(&ddr->debug[2])); in fsl_ddr_set_memctl_regs()
511 debug("Setting D1[15] to 0x%08x\n", in_be32(&ddr->debug[0])); in fsl_ddr_set_memctl_regs()
520 debug("Setting D6 to 0x%08x\n", in_be32(&ddr->debug[5])); in fsl_ddr_set_memctl_regs()
524 debug("Setting D7 to 0x%08x\n", in_be32(&ddr->debug[6])); in fsl_ddr_set_memctl_regs()
528 debug("Setting D2[20] to 0x%08x\n", in_be32(&ddr->debug[1])); in fsl_ddr_set_memctl_regs()
536 debug("Setting D1[15] to 0x%08x\n", in_be32(&ddr->debug[0])); in fsl_ddr_set_memctl_regs()
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A Dlc_common_dimm_params.c91 debug("using mclk_ps = %u\n", mclk_ps); in compute_cas_latency()
358 debug("no dimms this memory controller\n"); in compute_lowest_common_dimm_parameters()
472 debug("all DIMMs ECC capable\n"); in compute_lowest_common_dimm_parameters()
574 debug("trp_ps = %u\n", outpdimm->trp_ps); in compute_lowest_common_dimm_parameters()
577 debug("trfc1_ps = %u\n", trfc1_ps); in compute_lowest_common_dimm_parameters()
578 debug("trfc2_ps = %u\n", trfc2_ps); in compute_lowest_common_dimm_parameters()
579 debug("trfc4_ps = %u\n", trfc4_ps); in compute_lowest_common_dimm_parameters()
580 debug("trrds_ps = %u\n", trrds_ps); in compute_lowest_common_dimm_parameters()
581 debug("trrdl_ps = %u\n", trrdl_ps); in compute_lowest_common_dimm_parameters()
582 debug("tccdl_ps = %u\n", tccdl_ps); in compute_lowest_common_dimm_parameters()
[all …]
A Dfsl_ddr_gen4.c125 debug("modified bnds\n"); in fsl_ddr_set_memctl_regs()
263 if (regs->debug[i]) { in fsl_ddr_set_memctl_regs()
265 i+1, regs->debug[i]); in fsl_ddr_set_memctl_regs()
266 ddr_out32(&ddr->debug[i], regs->debug[i]); in fsl_ddr_set_memctl_regs()
300 temp32 = ddr_in32(&ddr->debug[25]); in fsl_ddr_set_memctl_regs()
396 debug("MR6 = 0x%08x\n", temp32); in fsl_ddr_set_memctl_regs()
401 debug("MR6 = 0x%08x\n", temp32); in fsl_ddr_set_memctl_regs()
406 debug("MR6 = 0x%08x\n", temp32); in fsl_ddr_set_memctl_regs()
471 ddr_out32(&ddr->debug[18], val32); in fsl_ddr_set_memctl_regs()
479 val32 = ddr_in32(&ddr->debug[28]); in fsl_ddr_set_memctl_regs()
[all …]
/drivers/usb/gadget/
A Drndis.c162 debug("%03d: %08x %08x %08x %08x\n", i, in gen_ndis_query_resp()
231 debug("%s: OID_GEN_LINK_SPEED\n", __func__); in gen_ndis_query_resp()
260 debug("%s: OID_GEN_VENDOR_ID\n", __func__); in gen_ndis_query_resp()
327 debug("%s: OID_GEN_XMIT_OK\n", __func__); in gen_ndis_query_resp()
341 debug("%s: OID_GEN_RCV_OK\n", __func__); in gen_ndis_query_resp()
366 debug("%s: OID_GEN_RCV_ERROR\n", __func__); in gen_ndis_query_resp()
663 debug("%03d: %08x %08x %08x %08x\n", i, in gen_ndis_set_resp()
869 debug("%s: InfoBuffer: ", __func__); in rndis_set_response()
874 debug("\n"); in rndis_set_response()
1094 debug("%03d: " in rndis_msg_parser()
[all …]
/drivers/remoteproc/
A Drproc-uclass.c141 debug("'%s': using fdt\n", dev->name); in rproc_pre_probe()
178 debug("Unnamed device!"); in rproc_pre_probe()
363 debug("Already initialized\n"); in rproc_init()
538 debug("trace rsc is truncated\n"); in handle_trace()
561 debug("devmem rsc is truncated\n"); in handle_devmem()
623 debug in handle_carveout()
719 debug("vdev rsc is truncated\n"); in handle_vdev()
795 debug("rsc table is truncated\n"); in handle_resources()
799 debug("rsc: type %d\n", hdr->type); in handle_resources()
888 debug("non zero reserved bytes\n"); in rproc_find_table()
[all …]
A Dsandbox_testproc.c138 debug("%s: called(%d)\n", uc_pdata->name, ret); in sandbox_testproc_probe()
158 debug("%s: called(%d)\n", uc_pdata->name, ret); in sandbox_testproc_init()
160 debug("%s init failed\n", uc_pdata->name); in sandbox_testproc_init()
180 debug("%s: called(%d)\n", uc_pdata->name, ret); in sandbox_testproc_reset()
183 debug("%s reset failed\n", uc_pdata->name); in sandbox_testproc_reset()
208 debug("%s load failed\n", uc_pdata->name); in sandbox_testproc_load()
227 debug("%s: called(%d)\n", uc_pdata->name, ret); in sandbox_testproc_start()
230 debug("%s start failed\n", uc_pdata->name); in sandbox_testproc_start()
249 debug("%s: called(%d)\n", uc_pdata->name, ret); in sandbox_testproc_stop()
252 debug("%s stop failed\n", uc_pdata->name); in sandbox_testproc_stop()
[all …]
A Dti_power_proc.c43 debug("'%s' no dt?\n", dev->name); in ti_of_to_priv()
49 debug("'%s': no 'reg' property\n", dev->name); in ti_of_to_priv()
55 debug("'%s': no 'ti,lpsc_module' property\n", dev->name); in ti_of_to_priv()
80 debug("%s probed with slave_addr=0x%08lX module=%d(%d)\n", in ti_powerproc_probe()
102 debug("%s: no uc pdata!\n", dev->name); in ti_powerproc_load()
109 debug("%s Unable to disable module '%d'(ret=%d)\n", in ti_powerproc_load()
119 debug("%s: Complete!\n", uc_pdata->name); in ti_powerproc_load()
137 debug("%s: no uc pdata!\n", dev->name); in ti_powerproc_start()
144 debug("%s Unable to disable module '%d'(ret=%d)\n", in ti_powerproc_start()
151 debug("%s Failed to wait for module '%d'(ret=%d)\n", in ti_powerproc_start()
[all …]
/drivers/ram/
A Dmpc83xx_sdram.c172 debug("%s: odt_rd_cfg value %d invalid.\n", in mpc83xx_sdram_static_init()
184 debug("%s: odt_rd_cfg value %d invalid.\n", in mpc83xx_sdram_static_init()
193 debug("%s: odt_rd_cfg value %d invalid.\n", in mpc83xx_sdram_static_init()
224 debug("%s: odt_wr_cfg value %d invalid.\n", in mpc83xx_sdram_static_init()
238 debug("%s: bank_bits value %d invalid.\n", in mpc83xx_sdram_static_init()
255 debug("%s: row_bits value %d invalid.\n", in mpc83xx_sdram_static_init()
275 debug("%s: col_bits value %d invalid.\n", in mpc83xx_sdram_static_init()
409 debug("%s: ddr_type value %d invalid.\n", in mpc83xx_sdram_probe()
416 debug("%s: mvref_sel value %d invalid.\n", in mpc83xx_sdram_probe()
423 debug("%s: m_odr value %d invalid.\n", in mpc83xx_sdram_probe()
[all …]
/drivers/i2c/
A Docteon_i2c.c268 debug("%s: timed out\n", __func__); in twsi_write_sw()
360 debug("%s(%p)\n", __func__, base); in twsi_wait()
366 debug(" return: %u\n", !twsi_ctl); in twsi_wait()
394 debug("%s(%p)\n", __func__, base); in twsi_start()
410 debug("%s: success\n", __func__); in twsi_start()
461 debug("%s: wait failed\n", __func__); in twsi_write_data()
471 debug("%s: Waiting\n", __func__); in twsi_write_data()
506 debug("%s: Stopping\n", __func__); in twsi_write_data()
553 debug("%s: start failed\n", __func__); in twsi_read_data()
559 debug("%s: wait failed\n", __func__); in twsi_read_data()
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A Drk_i2c.c87 debug("i2c_con: 0x%08x\n", readl(&regs->con)); in rk_i2c_show_regs()
93 debug("i2c_ien: 0x%08x\n", readl(&regs->ien)); in rk_i2c_show_regs()
94 debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd)); in rk_i2c_show_regs()
108 debug("I2c Send Start bit.\n"); in rk_i2c_send_start_bit()
121 debug("I2C Send Start Bit Timeout\n"); in rk_i2c_send_start_bit()
136 debug("I2c Send Stop bit.\n"); in rk_i2c_send_stop_bit()
149 debug("I2C Send Start Bit Timeout\n"); in rk_i2c_send_stop_bit()
233 debug("I2C Read Data Timeout\n"); in rk_i2c_read()
322 debug("I2C Write Data Timeout\n"); in rk_i2c_write()
346 debug("i2c_xfer: %d messages\n", nmsgs); in rockchip_i2c_xfer()
[all …]
/drivers/video/exynos/
A Dexynos_mipi_dsi_common.c104 debug("state is ULPS.\n"); in exynos_mipi_dsi_wr_data()
135 debug("data0 = %x data1 = %x\n", in exynos_mipi_dsi_wr_data()
319 debug("freq_band = %d\n", freq_band); in exynos_mipi_dsi_change_pll()
359 debug("failed to get hs clock.\n"); in exynos_mipi_dsi_set_clock()
393 debug("byte clock is %luMHz\n", in exynos_mipi_dsi_set_clock()
398 debug("escape clock is %luMHz\n", in exynos_mipi_dsi_set_clock()
404 debug("error rate is %lu over.\n", in exynos_mipi_dsi_set_clock()
409 debug("error rate is %lu under.\n", in exynos_mipi_dsi_set_clock()
447 debug("data lane is invalid.\n"); in exynos_mipi_dsi_init_dsim()
558 debug("DSI Master is already init.\n"); in exynos_mipi_dsi_init_link()
[all …]
/drivers/bios_emulator/include/x86emu/
A Ddebug.h66 # define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
67 # define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
68 # define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
70 # define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
71 # define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
72 # define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_CS_IP)
74 # define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
75 # define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
76 # define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
79 # define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
[all …]
/drivers/power/pmic/
A Dpmic-uclass.c40 debug("* Found child node: '%s'\n", node_name); in pmic_bind_children()
42 debug(" - ignoring disabled device\n"); in pmic_bind_children()
48 debug(" - compatible prefix: '%s'\n", info->prefix); in pmic_bind_children()
62 debug(" - driver: '%s' not found!\n", in pmic_bind_children()
67 debug(" - found child driver: '%s'\n", drv->name); in pmic_bind_children()
72 debug(" - child binding error: %d\n", ret); in pmic_bind_children()
76 debug(" - bound child device: '%s'\n", child->name); in pmic_bind_children()
80 debug(" - set 'child->driver_data': %lu\n", in pmic_bind_children()
88 debug(" - compatible prefix not found\n"); in pmic_bind_children()
150 debug(", value=%x, ret=%d\n", val, ret); in pmic_reg_read()
[all …]
/drivers/usb/eth/
A Dasix.c220 debug("asix_get_phy_addr()\n"); in asix_get_phy_addr()
339 debug("Failed to read SROM address 04h.\n"); in asix_read_mac_common()
347 debug("Failed to read MAC address.\n"); in asix_read_mac_common()
369 debug("Select PHY #1 failed\n"); in asix_basic_reset()
397 debug("Failed to read phy id\n"); in asix_basic_reset()
410 debug("Write IPG,IPG1,IPG2 failed\n"); in asix_basic_reset()
423 debug("** %s()\n", __func__); in asix_init_common()
468 debug("** %s(), len %d\n", __func__, length); in asix_send_common()
498 debug("** %s()\n", __func__); in asix_eth_stop()
534 debug("Rx: incomplete packet length\n"); in asix_eth_recv()
[all …]
A Dlan7x.c75 debug("MII is busy in %s\n", __func__); in lan7x_mdio_read()
272 debug("** %s()\n", __func__); in lan7x_update_flowcontrol()
281 debug("TX Flow "); in lan7x_update_flowcontrol()
290 debug("EN "); in lan7x_update_flowcontrol()
292 debug("DIS "); in lan7x_update_flowcontrol()
294 debug("RX Flow "); in lan7x_update_flowcontrol()
297 debug("EN"); in lan7x_update_flowcontrol()
299 debug("DIS"); in lan7x_update_flowcontrol()
302 debug("\n"); in lan7x_update_flowcontrol()
380 debug("** %s()\n", __func__); in lan7x_eth_stop()
[all …]
/drivers/mailbox/
A Dmailbox-uclass.c23 debug("%s(chan=%p)\n", __func__, chan); in mbox_of_xlate_default()
26 debug("Invalid args_count: %d\n", args->args_count); in mbox_of_xlate_default()
42 debug("%s(dev=%p, index=%d, chan=%p)\n", __func__, dev, index, chan); in mbox_get_by_index()
47 debug("%s: dev_read_phandle_with_args failed: %d\n", __func__, in mbox_get_by_index()
54 debug("%s: uclass_get_device_by_of_offset failed: %d\n", in mbox_get_by_index()
62 debug("%s: mbox node from parent failed: %d\n", in mbox_get_by_index()
75 debug("of_xlate() failed: %d\n", ret); in mbox_get_by_index()
82 debug("ops->request() failed: %d\n", ret); in mbox_get_by_index()
98 debug("fdt_stringlist_search() failed: %d\n", index); in mbox_get_by_name()
109 debug("%s(chan=%p)\n", __func__, chan); in mbox_free()
[all …]
/drivers/sysinfo/
A Dgazerbeam.c70 debug("%s: Could not get I2C bus %d (err = %d)\n", in _read_sysinfo_variant_data()
76 debug("%s: Could not get I2C bus %d\n", in _read_sysinfo_variant_data()
85 debug("%s: Board hardware configuration inconsistent.\n", in _read_sysinfo_variant_data()
96 debug("%s: Requesting gpio list %s failed (err = %d).\n", in _read_sysinfo_variant_data()
103 debug("%s: Error while reading 'sc' GPIO (err = %d)", in _read_sysinfo_variant_data()
111 debug("%s: Board hardware configuration inconsistent.\n", in _read_sysinfo_variant_data()
118 debug("%s: Error while reading 'con' GPIO (err = %d)", in _read_sysinfo_variant_data()
166 debug("%s: Error freeing HW version GPIO list (err = %d)\n", in _read_hwversion()
187 debug("%s: Error reading hardware version (err = %d)\n", in sysinfo_gazerbeam_detect()
210 debug("%s: Integer value %d unknown\n", dev->name, id); in sysinfo_gazerbeam_get_int()
[all …]
/drivers/sound/
A Dsamsung-i2s.c251 debug("%s: Invalid sample size input [0x%x]\n", in i2s_set_samplesize()
269 debug("%s : Invalid data size\n", __func__); in i2s_transfer_tx_data()
288 debug("%s: I2S Transfer Timeout\n", __func__); in i2s_transfer_tx_data()
359 debug("%s:set sample rate failed\n", __func__); in i2s_tx_init()
368 debug("%s: failed\n", __func__); in i2s_tx_init()
401 debug("%s: Missing i2s base\n", __func__); in samsung_i2s_of_to_plat()
413 debug("samplingrate = %d\n", priv->samplingrate); in samsung_i2s_of_to_plat()
420 debug("channels = %d\n", priv->channels); in samsung_i2s_of_to_plat()
423 debug("rfs = %d\n", priv->rfs); in samsung_i2s_of_to_plat()
426 debug("bfs = %d\n", priv->bfs); in samsung_i2s_of_to_plat()
[all …]
/drivers/fpga/
A Dsocfpga_arria10.c119 debug("FPGA: Additional %i sync word needed\n", i); in fpgamgr_wait_early_user_mode()
565 debug("FPGA: No FDT magic was found.\n"); in first_loading_rbf_to_buffer()
586 debug("FPGA: No valid FIT image was found.\n"); in first_loading_rbf_to_buffer()
610 debug("FPGA: FPGA node count: %d\n", count); in first_loading_rbf_to_buffer()
618 debug("FPGA: %s\n", uname); in first_loading_rbf_to_buffer()
647 debug("FPGA: No node '%s' was found in FIT.\n", in first_loading_rbf_to_buffer()
654 debug("FPGA: Data position was found.\n"); in first_loading_rbf_to_buffer()
663 debug("FPGA: Data offset was found.\n"); in first_loading_rbf_to_buffer()
682 debug("FPGA: No loadable was found.\n"); in first_loading_rbf_to_buffer()
820 debug("core bitstream.\n"); in socfpga_loadfs()
[all …]
/drivers/net/pfe_eth/
A Dpfe_driver.c49 debug("Pkt received:"); in pfe_recv()
457 debug("tmu init complete\n"); in pfe_tmu_init()
479 debug("bmu1 init: done\n"); in pfe_bmu_init()
482 debug("bmu2 init: done\n"); in pfe_bmu_init()
510 debug("GPI1 init complete\n"); in pfe_gpi_init()
513 debug("GPI2 init complete\n"); in pfe_gpi_init()
516 debug("HGPI init complete\n"); in pfe_gpi_init()
544 debug("HIF init complete\n"); in pfe_hif_init()
586 debug("bmu1 enabled\n"); in pfe_hw_init()
589 debug("bmu2 enabled\n"); in pfe_hw_init()
[all …]
/drivers/spi/
A Drk_spi.c69 debug("ssienr: \t\t0x%08x\n", readl(&regs->enr)); in rkspi_dump_regs()
70 debug("ser: \t\t0x%08x\n", readl(&regs->ser)); in rkspi_dump_regs()
71 debug("baudr: \t\t0x%08x\n", readl(&regs->baudr)); in rkspi_dump_regs()
76 debug("sr: \t\t0x%08x\n", readl(&regs->sr)); in rkspi_dump_regs()
77 debug("imr: \t\t0x%08x\n", readl(&regs->imr)); in rkspi_dump_regs()
78 debug("isr: \t\t0x%08x\n", readl(&regs->isr)); in rkspi_dump_regs()
113 debug("spi speed %u, div %u\n", speed, clk_div); in rkspi_set_clk()
148 debug("%s: delaying by %ld us\n", in spi_cs_activate()
154 debug("activate cs%u\n", cs); in spi_cs_activate()
167 debug("deactivate cs%u\n", cs); in spi_cs_deactivate()
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