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Searched refs:delay (Results 1 – 25 of 58) sorted by relevance

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/drivers/i2c/
A Di2c-gpio.c91 udelay(delay); in i2c_gpio_write_bit()
93 udelay(delay); in i2c_gpio_write_bit()
103 udelay(delay); in i2c_gpio_read_bit()
105 udelay(delay); in i2c_gpio_read_bit()
115 udelay(delay); in i2c_gpio_send_start()
117 udelay(delay); in i2c_gpio_send_start()
119 udelay(delay); in i2c_gpio_send_start()
121 udelay(delay); in i2c_gpio_send_start()
128 udelay(delay); in i2c_gpio_send_stop()
130 udelay(delay); in i2c_gpio_send_stop()
[all …]
A Di2c-versatile.c26 u32 delay; member
32 udelay(priv->delay); in versatile_sda_set()
39 udelay(priv->delay); in versatile_sda_get()
46 udelay(priv->delay); in versatile_scl_set()
53 udelay(priv->delay); in versatile_scl_get()
60 udelay(priv->delay); in versatile_i2c_start()
81 udelay(priv->delay); in versatile_i2c_read_bit()
91 udelay(priv->delay); in versatile_i2c_write_bit()
241 priv->delay = 1000000 / (speed << 2); in versatile_i2c_set_bus_speed()
253 priv->delay = 25; /* 25us * 4 = 100kHz */ in versatile_i2c_probe()
A Dnx_i2c.c127 uint delay = 0; in nx_i2c_set_sda_delay() local
136 delay = DIV_ROUND_UP(bus->sda_delay, t_pclk); in nx_i2c_set_sda_delay()
138 delay = DIV_ROUND_UP(delay, SDADLY_CLKSTEP); in nx_i2c_set_sda_delay()
140 if (delay > SDADLY_MAX) { in nx_i2c_set_sda_delay()
141 delay = SDADLY_MAX; in nx_i2c_set_sda_delay()
143 __func__, bus->sda_delay, t_pclk * delay * SDADLY_CLKSTEP, in nx_i2c_set_sda_delay()
147 __func__, bus->sda_delay, t_pclk * delay * SDADLY_CLKSTEP, in nx_i2c_set_sda_delay()
151 delay |= I2CLC_FILTER; in nx_i2c_set_sda_delay()
153 delay = 0; in nx_i2c_set_sda_delay()
157 delay &= 0x7; in nx_i2c_set_sda_delay()
[all …]
A Di2c-uclass.c598 unsigned int delay) in i2c_deblock_gpio_loop() argument
604 udelay(delay); in i2c_deblock_gpio_loop()
609 udelay(delay); in i2c_deblock_gpio_loop()
611 udelay(delay); in i2c_deblock_gpio_loop()
621 udelay(delay); in i2c_deblock_gpio_loop()
623 udelay(delay); in i2c_deblock_gpio_loop()
625 udelay(delay); in i2c_deblock_gpio_loop()
627 udelay(delay); in i2c_deblock_gpio_loop()
634 udelay(delay); in i2c_deblock_gpio_loop()
637 udelay(delay); in i2c_deblock_gpio_loop()
[all …]
/drivers/net/phy/
A Dmiiphybb.c42 ops->delay(miidev); in miiphy_pre()
44 ops->delay(miidev); in miiphy_pre()
50 ops->delay(miidev); in miiphy_pre()
52 ops->delay(miidev); in miiphy_pre()
55 ops->delay(miidev); in miiphy_pre()
57 ops->delay(miidev); in miiphy_pre()
60 ops->delay(miidev); in miiphy_pre()
62 ops->delay(miidev); in miiphy_pre()
65 ops->delay(miidev); in miiphy_pre()
67 ops->delay(miidev); in miiphy_pre()
[all …]
A Ddp83867.c255 int val, delay, cfg2; in dp83867_config() local
325 delay = (dp83867->rx_id_delay | in dp83867_config()
330 DP83867_RGMIIDCTL, delay); in dp83867_config()
A Dnxp-c45-tja11xx.c129 static int nxp_c45_check_delay(struct phy_device *phydev, u32 delay) in nxp_c45_check_delay() argument
131 if (delay < MIN_ID_PS) { in nxp_c45_check_delay()
137 if (delay > MAX_ID_PS) { in nxp_c45_check_delay()
/drivers/ddr/marvell/axp/
A Dddr3_read_leveling.c91 u32 delay, phase, pup, cs; in ddr3_read_leveling_hw() local
293 delay); in ddr3_read_leveling_sw()
413 delay = 0; in ddr3_read_leveling_single_cs_rl_mode()
473 delay, phase); in ddr3_read_leveling_single_cs_rl_mode()
525 delay++; in ddr3_read_leveling_single_cs_rl_mode()
539 delay = 0; in ddr3_read_leveling_single_cs_rl_mode()
561 delay = in ddr3_read_leveling_single_cs_rl_mode()
765 delay = 0; in ddr3_read_leveling_single_cs_window_mode()
876 delay; in ddr3_read_leveling_single_cs_window_mode()
948 delay++; in ddr3_read_leveling_single_cs_window_mode()
[all …]
A Dddr3_write_leveling.c67 u32 reg, phase, delay, cs, pup; in ddr3_write_leveling_hw() local
353 delay = in ddr3_wl_supplement()
362 phase, delay); in ddr3_wl_supplement()
369 delay = in ddr3_wl_supplement()
376 && (delay <= in ddr3_wl_supplement()
382 delay = 0x0; in ddr3_wl_supplement()
388 [D] = delay; in ddr3_wl_supplement()
393 phase, delay); in ddr3_wl_supplement()
1223 for (delay = 0; delay < MAX_DELAY; delay++) { in ddr3_write_leveling_single_cs()
1226 delay); in ddr3_write_leveling_single_cs()
[all …]
A Dddr3_hw_training.c548 void ddr3_write_pup_reg(u32 mode, u32 cs, u32 pup, u32 phase, u32 delay) in ddr3_write_pup_reg() argument
558 reg |= (phase << REG_PHY_PHASE_OFFS) | delay; in ddr3_write_pup_reg()
561 reg |= ((INIT_WL_DELAY + delay) << REG_PHY_DQS_REF_DLY_OFFS); in ddr3_write_pup_reg()
1023 u32 cs, delay; in ddr3_get_min_max_read_sample_delay() local
1032 delay = ((reg >> (cs * 8)) & 0x1F); in ddr3_get_min_max_read_sample_delay()
1034 if (delay < *min) in ddr3_get_min_max_read_sample_delay()
1035 *min = delay; in ddr3_get_min_max_read_sample_delay()
1037 if (delay > *max) { in ddr3_get_min_max_read_sample_delay()
1038 *max = delay; in ddr3_get_min_max_read_sample_delay()
/drivers/fpga/
A Dlattice.c60 void ispVMDelay(unsigned short delay) in ispVMDelay() argument
62 if (delay & 0x8000) in ispVMDelay()
63 delay = (delay & ~0x8000) * 1000; in ispVMDelay()
64 udelay(delay); in ispVMDelay()
/drivers/ram/sunxi/
A Ddram_sun20i_d1.c98 uint32_t delay; in eye_delay_compensation() local
102 delay = (para->dram_tpr11 & 0xf) << 9; in eye_delay_compensation()
103 delay |= (para->dram_tpr12 & 0xf) << 1; in eye_delay_compensation()
105 setbits_le32(ptr, delay); in eye_delay_compensation()
111 setbits_le32(ptr, delay); in eye_delay_compensation()
120 setbits_le32(0x3103334, delay); in eye_delay_compensation()
121 setbits_le32(0x3103338, delay); in eye_delay_compensation()
125 setbits_le32(0x31033b4, delay); in eye_delay_compensation()
126 setbits_le32(0x31033b8, delay); in eye_delay_compensation()
138 setbits_le32(ptr, delay); in eye_delay_compensation()
[all …]
/drivers/net/
A Deth-phy-uclass.c160 u32 delay; in eth_phy_reset() local
170 delay = value ? uc_priv->reset_assert_delay : uc_priv->reset_deassert_delay; in eth_phy_reset()
171 if (delay) in eth_phy_reset()
172 udelay(delay); in eth_phy_reset()
A Dravb.c440 unsigned int delay; in ravb_dmac_init_rcar() local
454 if (!dev_read_u32(dev, "rx-internal-delay-ps", &delay)) { in ravb_dmac_init_rcar()
456 if (delay) { in ravb_dmac_init_rcar()
462 if (!dev_read_u32(dev, "tx-internal-delay-ps", &delay)) { in ravb_dmac_init_rcar()
464 if (delay) { in ravb_dmac_init_rcar()
645 .delay = ravb_bb_delay,
/drivers/watchdog/
A Drenesas_wdt.c50 unsigned int delay; in rwdt_wait_cycles() local
52 delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate); in rwdt_wait_cycles()
54 usleep_range(delay, 2 * delay); in rwdt_wait_cycles()
/drivers/ram/octeon/
A Docteon_ddr.c1684 int delay; in compute_ddr3_rlevel_delay() local
1699 delay = min(delay, mstart + width - 1); in compute_ddr3_rlevel_delay()
1706 return delay; in compute_ddr3_rlevel_delay()
1793 int delay = 0; in get_wl_rank() local
1796 delay = in get_wl_rank()
1800 return delay; in get_wl_rank()
1823 delay = in get_rl_rank()
1827 return delay; in get_rl_rank()
1930 int delay; in roundup_ddr3_wlevel_bitmask() local
1945 delay = delay % 8; in roundup_ddr3_wlevel_bitmask()
[all …]
A Docteon3_lmc.c3548 int delay = 0; in lmc_modereg_params3() local
3551 delay = 1; in lmc_modereg_params3()
5354 int delay; in lmc_sw_write_leveling_loop() local
5403 if (delay < 32) { in lmc_sw_write_leveling_loop()
5406 b, delay); in lmc_sw_write_leveling_loop()
5426 b, delay); in lmc_sw_write_leveling_loop()
5452 b, delay); in lmc_sw_write_leveling_loop()
5561 int delay; in parallel_wl_block_delay() local
5658 delay += 2; in parallel_wl_block_delay()
6628 int delay; in rodt_loop() local
[all …]
/drivers/ddr/altera/
A Dsequencer.c325 u32 delay) in scc_mgr_set_dqs_io_in_delay() argument
332 u32 delay) in scc_mgr_set_dm_in_delay() argument
336 delay); in scc_mgr_set_dm_in_delay()
345 u32 delay) in scc_mgr_set_dqs_out1_delay() argument
352 u32 delay) in scc_mgr_set_dm_out1_delay() argument
356 delay); in scc_mgr_set_dm_out1_delay()
452 read_group, delay, 1); in scc_mgr_set_dqs_en_delay_all_ranks()
670 const u32 delay) in scc_mgr_apply_group_dq_out1_delay() argument
713 const u32 delay) in scc_mgr_apply_group_all_out_delay_add() argument
765 const u32 delay) in scc_mgr_apply_group_all_out_delay_add_all_ranks() argument
[all …]
/drivers/phy/qcom/
A Dphy-qcom-usb-hs-28nm.c22 int delay; member
95 if (seq->delay) in hsphy_init_sequence()
96 udelay(seq->delay); in hsphy_init_sequence()
214 #define HSPHY_INIT_CFG(o, v, d) { .offset = o, .val = v, .delay = d, }
/drivers/video/sunxi/
A Dlcdc.c19 int delay; in lcdc_get_clk_delay() local
21 delay = mode->vfront_porch.typ + mode->vsync_len.typ + in lcdc_get_clk_delay()
24 delay /= 2; in lcdc_get_clk_delay()
26 delay -= 2; in lcdc_get_clk_delay()
28 return (delay > 30) ? 30 : delay; in lcdc_get_clk_delay()
/drivers/spi/
A Dmtk_snor.c128 unsigned long long delay = CLK_TO_US(priv, clk); in mtk_snor_cmd_exec() local
133 delay = (delay + 1) * 200; in mtk_snor_cmd_exec()
135 !(reg & cmd), delay); in mtk_snor_cmd_exec()
239 ulong delay; in mtk_snor_dma_exec() local
248 delay = CLK_TO_US(priv, (length + 5) * BITS_PER_BYTE); in mtk_snor_dma_exec()
250 delay = (delay + 1) * 100; in mtk_snor_dma_exec()
252 !(reg & MTK_NOR_DMA_START), delay); in mtk_snor_dma_exec()
/drivers/power/regulator/
A Dstpmic1.c187 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS : in stpmic1_buck_set_enable() local
205 mdelay(delay); in stpmic1_buck_set_enable()
366 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS : in stpmic1_ldo_set_enable() local
384 mdelay(delay); in stpmic1_ldo_set_enable()
496 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS : in stpmic1_vref_ddr_set_enable() local
506 mdelay(delay); in stpmic1_vref_ddr_set_enable()
618 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS : in stpmic1_pwr_sw_set_enable() local
643 mdelay(delay); in stpmic1_pwr_sw_set_enable()
/drivers/mmc/
A Dnexell_dw_mmc.c81 unsigned int delay; in nx_dw_mmc_clk_delay() local
85 delay = NX_MMC_CLK_DELAY(priv->d_delay, in nx_dw_mmc_clk_delay()
88 writel(delay, (host->ioaddr + DWMCI_CLKCTRL)); in nx_dw_mmc_clk_delay()
/drivers/video/meson/
A Dmeson_registers.h988 #define ENCI_CFILT_CMPT_CR_DLY(delay) (delay & 0xf) argument
989 #define ENCI_CFILT_CMPT_CB_DLY(delay) ((delay & 0xf) << 4) argument
990 #define ENCI_CFILT_CVBS_CR_DLY(delay) ((delay & 0xf) << 8) argument
991 #define ENCI_CFILT_CVBS_CB_DLY(delay) ((delay & 0xf) << 12) argument
/drivers/led/
A Dled_bcm6328.c114 static unsigned long bcm6328_blink_delay(int delay) in bcm6328_blink_delay() argument
116 unsigned long bcm6328_delay = delay; in bcm6328_blink_delay()

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