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Searched refs:dq (Results 1 – 10 of 10) sorted by relevance

/drivers/ddr/marvell/axp/
A Dddr3_pbs.c125 for (dq = 0; dq < DQ_NUM; dq++) in ddr3_pbs_tx()
173 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_pbs_tx()
200 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_pbs_tx()
253 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_pbs_tx()
302 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_pbs_tx()
328 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_pbs_tx()
338 for (dq = 0; dq < DQ_NUM; dq++) in ddr3_pbs_tx()
353 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_pbs_tx()
568 for (dq = 0; dq < DQ_NUM; dq++) in ddr3_pbs_rx()
854 for (dq = 0; dq < DQ_NUM; dq++) in ddr3_pbs_rx()
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A Dddr3_dqs.c312 u32 dq; in ddr3_find_adll_limits() local
346 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_find_adll_limits()
378 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_find_adll_limits()
462 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_find_adll_limits()
468 [pup][dq] in ddr3_find_adll_limits()
577 for (dq = 0; dq < DQ_NUM; in ddr3_find_adll_limits()
668 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_find_adll_limits()
707 u32 dq; in ddr3_find_adll_limits() local
723 dq = 0; in ddr3_find_adll_limits()
775 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_find_adll_limits()
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A Dddr3_sdram.c97 __maybe_unused u32 dq; in compare_pattern_v1() local
113 for (dq = 0; dq < DQ_NUM; dq++) { in compare_pattern_v1()
116 if (((var1 >> dq) & 0x1) != in compare_pattern_v1()
117 ((var2 >> dq) & 0x1)) in compare_pattern_v1()
118 per_bit_data[val][dq] = 1; in compare_pattern_v1()
120 per_bit_data[val][dq] = 0; in compare_pattern_v1()
170 __maybe_unused u32 dq; in ddr3_sdram_compare() local
290 u32 ui, dq, pup; in ddr3_sdram_pbs_compare() local
362 for (dq = 0; dq < DQ_NUM; dq++) { in ddr3_sdram_pbs_compare()
376 pbs_write_pup[dq] |= in ddr3_sdram_pbs_compare()
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A Dddr3_hw_training.c698 u32 val, pup, tmp_cs, cs, i, dq; in ddr3_save_training() local
739 for (dq = 0; dq <= DQ_NUM; in ddr3_save_training()
740 dq++) { in ddr3_save_training()
742 mode_config[i] + dq, in ddr3_save_training()
/drivers/net/fsl-mc/dpio/
A Dqbman_portal.c375 const struct ldpaa_dq *dq; in qbman_swp_dqrr_next() local
379 p = qb_cl(dq); in qbman_swp_dqrr_next()
405 flags = ldpaa_dq_flags(dq); in qbman_swp_dqrr_next()
414 return dq; in qbman_swp_dqrr_next()
431 memset(dq, oldtoken, num_entries * sizeof(*dq)); in qbman_dq_entry_set_oldtoken()
435 const struct ldpaa_dq *dq, in qbman_dq_entry_has_newtoken() argument
450 uint32_t *p = qb_cl((struct ldpaa_dq *)dq); in qbman_dq_entry_has_newtoken()
471 if (s->vdq.storage == dq) { in qbman_dq_entry_has_newtoken()
484 const uint32_t *p = qb_cl(dq); in __qbman_dq_entry_is_x()
503 const uint32_t *p = qb_cl(dq); in ldpaa_dq_flags()
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/drivers/ram/sifive/
A Dsifive_ddr.c154 u32 dq = 0; in sifive_ddr_check_errata() local
182 fails |= (1 << dq); in sifive_ddr_check_errata()
187 slicelsc += (dq % 10); in sifive_ddr_check_errata()
188 slicemsc += (dq / 10); in sifive_ddr_check_errata()
200 dq++; in sifive_ddr_check_errata()
/drivers/ddr/marvell/a38x/
A Dmv_ddr4_training_calibration.c2049 u32 dq, pad; in mv_ddr4_dm_tuning() local
2173 for (dq = 0; dq < BUS_WIDTH_IN_BITS; dq++) { in mv_ddr4_dm_tuning()
2178 dq_pbs[dq] = reg_val; in mv_ddr4_dm_tuning()
2184 new_dq_pbs[dq] = dq_pbs[dq] + (u32)c; in mv_ddr4_dm_tuning()
2186 max_pbs = new_dq_pbs[dq]; in mv_ddr4_dm_tuning()
2190 for (dq = 0; dq < BUS_WIDTH_IN_BITS; dq++) { in mv_ddr4_dm_tuning()
2250 for (dq = 0; dq < BUS_WIDTH_IN_BITS; dq++) { in mv_ddr4_dm_tuning()
2256 dq_pbs[dq] = reg_val; in mv_ddr4_dm_tuning()
2261 new_dq_pbs[dq] = dq_pbs[dq] + (u32)c; in mv_ddr4_dm_tuning()
2263 max_pbs = new_dq_pbs[dq]; in mv_ddr4_dm_tuning()
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/drivers/net/ldpaa_eth/
A Dldpaa_eth.c187 const struct ldpaa_dq *dq; in ldpaa_eth_pull_dequeue_rx() local
209 dq = qbman_swp_dqrr_next(swp); in ldpaa_eth_pull_dequeue_rx()
210 } while (get_timer(time_start) < timeo && !dq); in ldpaa_eth_pull_dequeue_rx()
212 if (dq) { in ldpaa_eth_pull_dequeue_rx()
218 status = (uint8_t)ldpaa_dq_flags(dq); in ldpaa_eth_pull_dequeue_rx()
223 qbman_swp_dqrr_consume(swp, dq); in ldpaa_eth_pull_dequeue_rx()
227 fd = ldpaa_dq_fd(dq); in ldpaa_eth_pull_dequeue_rx()
231 qbman_swp_dqrr_consume(swp, dq); in ldpaa_eth_pull_dequeue_rx()
/drivers/ram/rockchip/
A Dsdram_rv1126.c1987 u8 dq; in save_rw_trn_min_max() local
1997 for (dq = 0; dq < 8; dq++) { in save_rw_trn_min_max()
1998 rd_result->dqs[dqs].dq_min[dq] = in save_rw_trn_min_max()
2000 rd_result->dqs[dqs].dq_max[dq] = in save_rw_trn_min_max()
2002 wr_result->dqs[dqs].dq_min[dq] = in save_rw_trn_min_max()
2004 wr_result->dqs[dqs].dq_max[dq] = in save_rw_trn_min_max()
2016 u8 dq; in save_rw_trn_deskew() local
2023 for (dq = 0; dq < 8; dq++) { in save_rw_trn_deskew()
2024 result->cs[cs].dqs[0].dq_deskew[dq] = in save_rw_trn_deskew()
2026 result->cs[cs].dqs[1].dq_deskew[dq] = in save_rw_trn_deskew()
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A Dsdram-rv1126-loader_params.inc137 /* ddr4 dq map */

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