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Searched refs:ecc_ena (Results 1 – 9 of 9) sorted by relevance

/drivers/ram/octeon/
A Docteon3_lmc.c2100 if (ecc_ena) { in unpack_rlevel_settings()
2135 if (ecc_ena) { in pack_rlevel_settings()
2403 ecc_ena); in display_rl_bm()
2410 ecc_ena); in display_rl_bm_scores()
5003 ecc_ena = cfg.s.ecc_ena; in lmc_write_leveling()
6730 ecc_ena); in rodt_loop()
6732 ecc_ena); in rodt_loop()
7007 if (!ecc_ena) { in rank_major_loop()
7900 ecc_ena = cfg.cn78xx.ecc_ena; in lmc_read_leveling()
10783 int ecc_ena; in cvmx_dbi_switchover_interface() local
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/drivers/ddr/marvell/axp/
A Dddr3_hw_training.c108 dram_info.ecc_ena = 1; in ddr3_hw_training()
112 dram_info.ecc_ena = 0; in ddr3_hw_training()
121 dram_info.num_of_total_pups = ddr_width / PUP_SIZE + dram_info.ecc_ena; in ddr3_hw_training()
452 if (dram_info.ecc_ena) { in ddr3_hw_training()
722 dram_info->ecc_ena) in ddr3_save_training()
953 if (dram_info->ecc_ena) { in ddr3_training_suspend_resume()
A Dddr3_write_leveling.c113 && dram_info->ecc_ena) in ddr3_write_leveling_hw()
142 && dram_info->ecc_ena) in ddr3_write_leveling_hw()
238 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); in ddr3_wl_supplement()
256 (dram_info->ecc_ena * in ddr3_wl_supplement()
412 if (dram_info->ecc_ena) in ddr3_wl_supplement()
435 && dram_info->ecc_ena) in ddr3_wl_supplement()
536 && dram_info->ecc_ena) in ddr3_write_leveling_hw_reg_dimm()
A Dddr3_read_leveling.c103 && dram_info->ecc_ena) in ddr3_read_leveling_hw()
134 && dram_info->ecc_ena) in ddr3_read_leveling_hw()
205 for (ecc = 0; ecc <= (dram_info->ecc_ena); ecc++) { in ddr3_read_leveling_sw()
209 reg |= (dram_info->ecc_ena * in ddr3_read_leveling_sw()
266 pup < (dram_info->num_of_std_pups + dram_info->ecc_ena); in ddr3_read_leveling_sw()
284 pup < (dram_info->num_of_std_pups + dram_info->ecc_ena); in ddr3_read_leveling_sw()
A Dddr3_pbs.c135 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_pbs_tx()
161 reg |= (dram_info->ecc_ena * ecc << in ddr3_pbs_tx()
371 if (pup == (max_pup - 1) && dram_info->ecc_ena) in ddr3_pbs_tx()
578 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_pbs_rx()
603 reg |= (dram_info->ecc_ena * ecc << in ddr3_pbs_rx()
1429 if (pup == (max_pup - 1) && dram_info->ecc_ena) in ddr3_set_pbs_results()
A Dddr3_init.h116 int ddr3_dunit_setup(u32 ecc_ena, u32 hclk_time, u32 *ddr_width);
A Dddr3_dqs.c155 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_dqs_centralization_rx()
160 reg |= (dram_info->ecc_ena * in ddr3_dqs_centralization_rx()
236 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_dqs_centralization_tx()
240 reg |= (dram_info->ecc_ena * in ddr3_dqs_centralization_tx()
A Dddr3_hw_training.h258 u32 ecc_ena; /* 0/1 */ member
A Dddr3_spd.c585 int ddr3_dunit_setup(u32 ecc_ena, u32 hclk_time, u32 *ddr_width) argument
726 if (ecc_ena && ddr3_get_min_val(sum_info.err_check_type, dimm_num,

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