| /drivers/video/rockchip/ |
| A D | rk_vop.c | 43 const struct display_timing *edid, in rkvop_enable() argument
51 u32 hactive = edid->hactive.typ; in rkvop_enable()
52 u32 vactive = edid->vactive.typ; in rkvop_enable()
58 writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) | in rkvop_enable()
59 V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ), in rkvop_enable()
162 const struct display_timing *edid, in rkvop_mode_set() argument
171 u32 hactive = edid->hactive.typ; in rkvop_mode_set()
172 u32 vactive = edid->vactive.typ; in rkvop_mode_set()
173 u32 hsync_len = edid->hsync_len.typ; in rkvop_mode_set()
174 u32 hback_porch = edid->hback_porch.typ; in rkvop_mode_set()
[all …]
|
| A D | rk3399_hdmi.c | 21 const struct display_timing *edid) in rk3399_hdmi_enable() argument
32 return dw_hdmi_enable(&priv->hdmi, edid); in rk3399_hdmi_enable()
|
| A D | rk3288_hdmi.c | 23 const struct display_timing *edid) in rk3288_hdmi_enable() argument
36 return dw_hdmi_enable(&priv->hdmi, edid); in rk3288_hdmi_enable()
|
| A D | rk3328_hdmi.c | 20 const struct display_timing *edid) in rk3328_hdmi_enable() argument
24 return dw_hdmi_enable(&priv->hdmi, edid); in rk3328_hdmi_enable()
|
| A D | rk_lvds.c | 52 const struct display_timing *edid) in rk_lvds_enable() argument
|
| A D | rk_edp.c | 723 unsigned int val_addr, unsigned int count, u8 edid[]) in rk_edp_i2c_read() argument
782 edid[i + cur_data_idx] = (u8)val; in rk_edp_i2c_read()
960 const struct display_timing *edid) in rk_edp_enable() argument
|
| /drivers/video/ |
| A D | dw_hdmi.c | 459 const struct display_timing *edid) in hdmi_av_composer() argument
466 hbl = edid->hback_porch.typ + edid->hfront_porch.typ + in hdmi_av_composer()
467 edid->hsync_len.typ; in hdmi_av_composer()
468 vbl = edid->vback_porch.typ + edid->vfront_porch.typ + in hdmi_av_composer()
469 edid->vsync_len.typ; in hdmi_av_composer()
486 inv_val |= (edid->hdmi_monitor ? in hdmi_av_composer()
1002 edid->hdmi_monitor ? "hdmi" : "dvi", in dw_hdmi_enable()
1003 edid->pixelclock.typ, edid->hactive.typ, edid->vactive.typ); in dw_hdmi_enable()
1005 hdmi_av_composer(hdmi, edid); in dw_hdmi_enable()
1011 hdmi_enable_video_path(hdmi, edid->hdmi_monitor); in dw_hdmi_enable()
[all …]
|
| /drivers/video/sunxi/ |
| A D | sunxi_lcd.c | 39 const struct display_timing *edid) in sunxi_lcd_enable() argument
56 lcdc_pll_set(ccm, 0, edid->pixelclock.typ / 1000, in sunxi_lcd_enable()
58 lcdc_tcon0_mode_set(lcdc, edid, clk_div, false, in sunxi_lcd_enable()
90 u8 edid[EDID_SIZE]; in sunxi_lcd_probe() local
98 ret = video_bridge_read_edid(cdev, edid, EDID_SIZE); in sunxi_lcd_probe()
100 ret = edid_get_timing(edid, ret, in sunxi_lcd_probe()
|
| A D | sunxi_dw_hdmi.c | 238 static void sunxi_dw_hdmi_lcdc_init(int mux, const struct display_timing *edid, in sunxi_dw_hdmi_lcdc_init() argument
243 int div = DIV_ROUND_UP(clock_get_pll3(), edid->pixelclock.typ); in sunxi_dw_hdmi_lcdc_init()
269 lcdc_tcon1_mode_set(lcdc, edid, false, false); in sunxi_dw_hdmi_lcdc_init()
297 const struct display_timing *edid) in sunxi_dw_hdmi_enable() argument
305 ret = dw_hdmi_enable(&priv->hdmi, edid); in sunxi_dw_hdmi_enable()
309 sunxi_dw_hdmi_lcdc_init(uc_plat->source_id, edid, panel_bpp); in sunxi_dw_hdmi_enable()
311 if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW) in sunxi_dw_hdmi_enable()
314 if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW) in sunxi_dw_hdmi_enable()
|
| A D | sunxi_display.c | 1094 int hpd, hpd_delay, edid; local
1107 edid = video_get_option_int(options, "edid", 1);
1130 if (hdmi_present && edid) {
1138 if (edid && !hdmi_present) {
1145 if ((hpd || edid) && !hdmi_present) {
|
| /drivers/video/exynos/ |
| A D | exynos_dp.c | 71 unsigned char edid[EDID_BLOCK_LENGTH * 2]; in exynos_dp_read_edid() local
95 &edid[EDID_HEADER_PATTERN]); in exynos_dp_read_edid()
100 sum = exynos_dp_calc_edid_check_sum(edid); in exynos_dp_read_edid()
111 &edid[EDID_BLOCK_LENGTH]); in exynos_dp_read_edid()
116 sum = exynos_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]); in exynos_dp_read_edid()
127 edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]); in exynos_dp_read_edid()
140 &edid[EDID_HEADER_PATTERN]); in exynos_dp_read_edid()
146 sum = exynos_dp_calc_edid_check_sum(edid); in exynos_dp_read_edid()
156 DPCD_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]); in exynos_dp_read_edid()
|
| A D | exynos_dp_lowlevel.h | 50 unsigned char edid[]);
|
| A D | exynos_dp_lowlevel.c | 763 unsigned char edid[]) in exynos_dp_read_bytes_from_i2c() argument
823 edid[i + cur_data_idx] = (unsigned char)reg; in exynos_dp_read_bytes_from_i2c()
|
| /drivers/video/bridge/ |
| A D | anx6345.c | 20 u8 edid[EDID_SIZE]; member
258 memcpy(buf, priv->edid, size); in anx6345_read_edid()
340 anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid); in anx6345_enable()
341 if (edid_get_timing(priv->edid, EDID_SIZE, &timing, &bpp) != 0) { in anx6345_enable()
|
| /drivers/video/meson/ |
| A D | meson_dw_hdmi.c | 354 const struct display_timing *edid) in meson_dw_hdmi_enable() argument
359 return dw_hdmi_enable(&priv->hdmi, edid); in meson_dw_hdmi_enable()
|