| /drivers/video/meson/ |
| A D | meson_vclk.c | 435 if (frac) in meson_hdmi_pll_set_params()
437 0x00004000 | frac); in meson_hdmi_pll_set_params()
482 if (frac < 0x10000) { in meson_hdmi_pll_set_params()
574 unsigned int frac; in meson_hdmi_pll_get_frac() local
592 if (frac_m > frac) in meson_hdmi_pll_get_frac()
594 frac -= frac_m; in meson_hdmi_pll_get_frac()
601 unsigned int frac) in meson_hdmi_pll_validate_params() argument
630 unsigned int *frac, in meson_hdmi_pll_find_params() argument
641 freq, *m, *frac, *od); in meson_hdmi_pll_find_params()
654 unsigned int od, m, frac; in meson_vclk_dmt_supported_freq() local
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| /drivers/clk/imx/ |
| A D | clk-pfd.c | 48 u8 frac = (readl(pfd->reg) >> (pfd->idx * 8)) & 0x3f; in clk_pfd_recalc_rate() local
51 do_div(tmp, frac); in clk_pfd_recalc_rate()
61 u8 frac; in clk_pfd_set_rate() local
65 frac = tmp; in clk_pfd_set_rate()
66 if (frac < 12) in clk_pfd_set_rate()
67 frac = 12; in clk_pfd_set_rate()
68 else if (frac > 35) in clk_pfd_set_rate()
69 frac = 35; in clk_pfd_set_rate()
72 writel(frac << (pfd->idx * 8), pfd->reg + SET); in clk_pfd_set_rate()
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| /drivers/pwm/ |
| A D | pwm-sifive.c | 69 u32 scale, val = 0, frac; in pwm_sifive_set_config() local
91 frac = DIV_ROUND_CLOSEST_ULL(num, period_ns); in pwm_sifive_set_config()
92 frac = min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); in pwm_sifive_set_config()
93 frac = (1U << PWM_SIFIVE_CMPWIDTH) - 1 - frac; in pwm_sifive_set_config()
96 writel(frac, priv->base + regs->cmp0 + channel * in pwm_sifive_set_config()
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| /drivers/clk/starfive/ |
| A D | clk-jh7110-pll.c | 48 u32 frac; member
55 u32 frac; member
135 .frac = 0x20,
152 .frac = 0x28,
169 .frac = 0x30,
249 u64 frac; in jh7110_pllx_recalc_rate() local
261 frac = (u64)getbits_le32((ulong)pll->base + pll->offset->frac, in jh7110_pllx_recalc_rate()
291 frac = 0; in jh7110_pllx_recalc_rate()
293 do_div(frac, 1 << 24); in jh7110_pllx_recalc_rate()
297 refclk *= (fbdiv + frac); in jh7110_pllx_recalc_rate()
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| /drivers/phy/ |
| A D | phy-stm32-usbphyc.c | 140 u16 frac; member
160 unsigned long long fvco, ndiv, frac; in stm32_usbphyc_get_pll_params() local
177 frac = fvco * (1 << 16); in stm32_usbphyc_get_pll_params()
178 do_div(frac, (clk_rate * 2)); in stm32_usbphyc_get_pll_params()
179 frac = frac - (ndiv * (1 << 16)); in stm32_usbphyc_get_pll_params()
180 pll_params->frac = (u16)frac; in stm32_usbphyc_get_pll_params()
200 if (pll_params.frac) { in stm32_usbphyc_pll_init()
202 usbphyc_pll |= ((pll_params.frac << PLLFRACIN_SHIFT) in stm32_usbphyc_pll_init()
209 clk_rate, pll_params.ndiv, pll_params.frac); in stm32_usbphyc_pll_init()
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| /drivers/clk/ |
| A D | clk_pic32.c | 179 u64 frac; in pic32_set_refclk() local
191 frac = parent_rate; in pic32_set_refclk()
192 frac <<= 8; in pic32_set_refclk()
193 do_div(frac, rate); in pic32_set_refclk()
194 frac -= (u64)(div << 9); in pic32_set_refclk()
195 trim = (frac >= REFO_TRIM_MAX) ? REFO_TRIM_MAX : (u32)frac; in pic32_set_refclk()
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| A D | clk_versal.c | 440 u32 frac; in versal_clock_get_pll_rate() local
459 frac = ret_payload[1]; in versal_clock_get_pll_rate()
461 freq = (fbdiv * parent_rate) >> (1 << frac); in versal_clock_get_pll_rate()
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| /drivers/clk/rockchip/ |
| A D | clk_pll.c | 135 rate_table->frac = 0; in rockchip_pll_clk_set_by_auto()
154 rate_table->frac = 0; in rockchip_pll_clk_set_by_auto()
161 rate_table->frac = frac_64; in rockchip_pll_clk_set_by_auto()
162 if (rate_table->frac > 0) in rockchip_pll_clk_set_by_auto()
164 debug("frac = %x\n", rate_table->frac); in rockchip_pll_clk_set_by_auto()
306 __func__, rate->rate, rate->postdiv2, rate->dsmpd, rate->frac); in rk3036_pll_set_rate()
338 (rate->frac << RK3036_PLLCON2_FRAC_SHIFT), in rk3036_pll_set_rate()
367 u32 refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac; in rk3036_pll_get_rate() local
399 frac = (con & RK3036_PLLCON2_FRAC_MASK) >> in rk3036_pll_get_rate()
403 u64 frac_rate = OSC_HZ * (u64)frac; in rk3036_pll_get_rate()
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| A D | clk_rk3328.c | 28 u32 frac; member
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| A D | clk_rk3399.c | 44 u32 frac; member
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| A D | clk_px30.c | 43 .frac = _frac, \
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| /drivers/clk/at91/ |
| A D | clk-sam9x60-pll.c | 57 u32 *mul, u32 *frac, ulong rate, in sam9x60_frac_pll_compute_mul_frac() argument
88 *frac = nfrac; in sam9x60_frac_pll_compute_mul_frac()
143 u32 mul, frac, val; in sam9x60_frac_pll_get_rate() local
153 frac = (val & pll->layout->frac_mask) >> pll->layout->frac_shift; in sam9x60_frac_pll_get_rate()
154 pll_rate = (parent_rate * (mul + 1) + ((u64)parent_rate * frac >> 22)); in sam9x60_frac_pll_get_rate()
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| /drivers/clk/meson/ |
| A D | g12a.c | 692 u16 n, m, od, frac; in meson_pll_get_rate() local
732 frac = PARM_GET(pfrac->width - 1, pfrac->shift, reg); in meson_pll_get_rate()
734 frac_rate = DIV_ROUND_UP_ULL((u64)parent_rate_mhz * frac, in meson_pll_get_rate()
737 if (frac & BIT(pfrac->width - 1)) in meson_pll_get_rate()
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| /drivers/phy/rockchip/ |
| A D | phy-rockchip-inno-hdmi.c | 461 unsigned long frac; in inno_hdmi_phy_rk3328_clk_recalc_rate() local
472 frac = inno_read(inno, 0xd3) | in inno_hdmi_phy_rk3328_clk_recalc_rate()
475 vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24)); in inno_hdmi_phy_rk3328_clk_recalc_rate()
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| /drivers/video/ |
| A D | dw_mipi_dsi.c | 602 u32 frac, lbcc; in dw_mipi_dsi_get_hcomponent_lbcc() local
606 frac = lbcc % (timings->pixelclock.typ / 1000); in dw_mipi_dsi_get_hcomponent_lbcc()
608 if (frac) in dw_mipi_dsi_get_hcomponent_lbcc()
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| A D | console_truetype.c | 33 static double frac(double val) in frac() function
299 xpos = frac(VID_TO_PIXEL((double)x)); in console_truetype_putc_xy()
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| /drivers/clk/stm32/ |
| A D | clk-stm32mp13.c | 1145 u32 divm, divn, divp, frac; in stm32mp1_pll1_opp() local
1188 frac = (u32)(((freq * FRAC_MAX) / input_freq) - in stm32mp1_pll1_opp()
1192 if (frac > FRAC_MAX) in stm32mp1_pll1_opp()
1196 ((post_divm * (u64)frac) / in stm32mp1_pll1_opp()
1200 frac++; in stm32mp1_pll1_opp()
1212 *fracv = frac; in stm32mp1_pll1_opp()
1220 frac++; in stm32mp1_pll1_opp()
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| A D | clk-stm32mp1.c | 1350 u32 divm, divn, divp, frac; in stm32mp1_pll1_opp() local
1393 frac = (u32)(((freq * FRAC_MAX) / input_freq) - in stm32mp1_pll1_opp()
1397 if (frac > FRAC_MAX) in stm32mp1_pll1_opp()
1401 ((post_divm * (u64)frac) / in stm32mp1_pll1_opp()
1405 frac++; in stm32mp1_pll1_opp()
1417 *fracv = frac; in stm32mp1_pll1_opp()
1424 frac++; in stm32mp1_pll1_opp()
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| /drivers/clk/thead/ |
| A D | clk-th1520-ap.c | 244 unsigned long div, mul, frac; in th1520_pll_vco_recalc_rate() local
255 frac = FIELD_GET(TH1520_PLL_FRAC, cfg1); in th1520_pll_vco_recalc_rate()
256 mul += frac; in th1520_pll_vco_recalc_rate()
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| /drivers/ram/renesas/dbsc5/ |
| A D | dram.c | 2111 static u32 dbsc5_f_scale(struct renesas_dbsc5_dram_priv *priv, const bool frac, u32 ps, u32 cyc) in dbsc5_f_scale() argument
2113 const u32 mul = frac ? 8 : 800000; in dbsc5_f_scale()
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