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Searched refs:fvco (Results 1 – 7 of 7) sorted by relevance

/drivers/clk/exynos/
A Dclk-pll.c47 u64 fvco = clk_get_parent_rate(clk); in samsung_pll0822x_recalc_rate() local
54 fvco *= mdiv; in samsung_pll0822x_recalc_rate()
55 do_div(fvco, (pdiv << sdiv)); in samsung_pll0822x_recalc_rate()
56 return (unsigned long)fvco; in samsung_pll0822x_recalc_rate()
81 u64 fvco = clk_get_parent_rate(clk); in samsung_pll0831x_recalc_rate() local
90 fvco *= (mdiv << 16) + kdiv; in samsung_pll0831x_recalc_rate()
91 do_div(fvco, (pdiv << sdiv)); in samsung_pll0831x_recalc_rate()
92 fvco >>= 16; in samsung_pll0831x_recalc_rate()
94 return (unsigned long)fvco; in samsung_pll0831x_recalc_rate()
A Dclk-exynos7420.c78 u64 fvco = fin_freq; in pll145x_get_rate() local
84 fvco *= mdiv; in pll145x_get_rate()
85 do_div(fvco, (pdiv << sdiv)); in pll145x_get_rate()
86 return (unsigned long)fvco; in pll145x_get_rate()
/drivers/clk/rockchip/
A Dclk_pll.c176 ffrac = fvco - (m * fref); in rockchip_rk3588_pll_k_get()
181 ffrac = ((m + 1) * fref) - fvco; in rockchip_rk3588_pll_k_get()
197 u64 fvco; in rockchip_rk3588_pll_frac_by_auto() local
200 fvco = (u64)fout_hz << s; in rockchip_rk3588_pll_frac_by_auto()
201 if (fvco < RK3588_VCO_MIN_HZ || fvco > RK3588_VCO_MAX_HZ) in rockchip_rk3588_pll_frac_by_auto()
209 fvco); in rockchip_rk3588_pll_frac_by_auto()
233 ulong fvco; in rk3588_pll_clk_set_by_auto() local
243 fvco = fout_hz << s; in rk3588_pll_clk_set_by_auto()
244 if (fvco < RK3588_VCO_MIN_HZ || in rk3588_pll_clk_set_by_auto()
245 fvco > RK3588_VCO_MAX_HZ) in rk3588_pll_clk_set_by_auto()
[all …]
/drivers/clk/imx/
A Dclk-fracn-gppll.c161 u64 fvco = clk_get_parent_rate(clk); in clk_fracn_gppll_recalc_rate() local
209 fvco = fvco * mfi; in clk_fracn_gppll_recalc_rate()
210 do_div(fvco, rdiv * odiv); in clk_fracn_gppll_recalc_rate()
213 fvco = fvco * mfi * mfd + fvco * mfn; in clk_fracn_gppll_recalc_rate()
214 do_div(fvco, mfd * rdiv * odiv); in clk_fracn_gppll_recalc_rate()
217 return (unsigned long)fvco; in clk_fracn_gppll_recalc_rate()
A Dclk-pll14xx.c132 u64 fvco = clk_get_parent_rate(clk); in clk_pll1416x_recalc_rate() local
140 fvco *= mdiv; in clk_pll1416x_recalc_rate()
141 do_div(fvco, pdiv << sdiv); in clk_pll1416x_recalc_rate()
143 return fvco; in clk_pll1416x_recalc_rate()
149 u64 fvco = clk_get_parent_rate(clk); in clk_pll1443x_recalc_rate() local
161 fvco *= (mdiv * 65536 + kdiv); in clk_pll1443x_recalc_rate()
164 do_div(fvco, pdiv << sdiv); in clk_pll1443x_recalc_rate()
166 return fvco; in clk_pll1443x_recalc_rate()
/drivers/phy/
A Dphy-stm32-usbphyc.c160 unsigned long long fvco, ndiv, frac; in stm32_usbphyc_get_pll_params() local
171 fvco = (unsigned long long)PLL_FVCO * 1000000; /* In Hz */ in stm32_usbphyc_get_pll_params()
173 ndiv = fvco; in stm32_usbphyc_get_pll_params()
177 frac = fvco * (1 << 16); in stm32_usbphyc_get_pll_params()
/drivers/clk/stm32/
A Dclk-stm32mp1.c925 ulong refclk, fvco; in pll_get_fvco() local
944 fvco = (ulong)lldiv((unsigned long long)refclk * in pll_get_fvco()
948 fvco = (ulong)(refclk * (divn + 1) / (divm + 1)); in pll_get_fvco()
951 return fvco; in pll_get_fvco()
2132 ulong fvco; in pll_set_output_rate() local
2137 fvco = pll_get_fvco(priv, pll_id); in pll_set_output_rate()
2139 if (fvco <= clk_rate) in pll_set_output_rate()
2142 div = DIV_ROUND_UP(fvco, clk_rate); in pll_set_output_rate()

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