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Searched refs:id (Results 1 – 25 of 1791) sorted by relevance

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/drivers/ata/
A Dlibata.c104 id[49], in ata_dump_id()
105 id[53], in ata_dump_id()
106 id[63], in ata_dump_id()
107 id[64], in ata_dump_id()
113 id[76], in ata_dump_id()
114 id[78], in ata_dump_id()
122 id[80], in ata_dump_id()
123 id[81], in ata_dump_id()
124 id[82], in ata_dump_id()
125 id[83], in ata_dump_id()
[all …]
/drivers/clk/at91/
A Dsama7d65.c260 u8 id; member
269 .id = 0,
279 .id = 0,
289 .id = 1,
299 .id = 1,
309 .id = 2,
319 .id = 2,
456 u8 id; member
590 u8 id; member
614 u8 id; member
[all …]
A Dsama7g5.c246 u8 id; member
255 .id = 0,
265 .id = 0,
275 .id = 1,
285 .id = 1,
295 .id = 2,
305 .id = 2,
410 u8 id; member
490 u8 id; member
514 u8 id; member
[all …]
A Dsam9x60.c207 u8 id; member
217 .id = 0,
228 .id = 0,
239 .id = 1,
250 .id = 1,
281 u8 id; member
298 u8 id; member
360 u8 id; member
529 sam9x60_plls[i].id, in sam9x60_clk_probe()
547 sam9x60_plls[i].id, in sam9x60_clk_probe()
[all …]
A Dsam9x7.c289 u8 id; member
299 .id = 0,
310 .id = 0,
321 .id = 1,
332 .id = 1,
343 .id = 2,
354 .id = 2,
365 .id = 2,
430 u8 id; member
445 u8 id; member
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A Dclk-peripheral.c24 #define PERIPHERAL_MASK(id) (1 << ((id) & PERIPHERAL_ID_MAX)) argument
31 u32 id; member
41 u32 id; member
53 u32 id = periph->id; in clk_peripheral_enable() local
55 if (id < PERIPHERAL_ID_MIN) in clk_peripheral_enable()
57 if (id > PERIPHERAL_ID_MAX) in clk_peripheral_enable()
68 u32 id = periph->id; in clk_peripheral_disable() local
101 periph->id = id; in at91_clk_register_peripheral()
117 .id = UCLASS_CLK,
231 periph->id = id; in at91_clk_register_sam9x5_peripheral()
[all …]
A Dclk-system.c27 u8 id; member
32 static inline int is_pck(int id) in is_pck() argument
34 return (id >= 8) && (id <= 15); in is_pck()
43 return !!(status & (1 << id)); in clk_system_ready()
50 pmc_write(sys->base, AT91_PMC_SCER, 1 << sys->id); in clk_system_enable()
52 if (!is_pck(sys->id)) in clk_system_enable()
55 while (!clk_system_ready(sys->base, sys->id)) { in clk_system_enable()
56 debug("waiting for pck%u\n", sys->id); in clk_system_enable()
79 const char *parent_name, u8 id) in at91_clk_register_system() argument
92 sys->id = id; in at91_clk_register_system()
[all …]
A Dclk-sam9x60-pll.c42 u8 id; member
111 pll->id); in sam9x60_frac_pll_set_rate()
150 pll->id); in sam9x60_frac_pll_get_rate()
175 pll->id); in sam9x60_frac_pll_enable()
234 pll->id); in sam9x60_frac_pll_disable()
265 pll->id); in sam9x60_div_pll_enable()
294 pll->id); in sam9x60_div_pll_disable()
324 pll->id); in sam9x60_div_pll_set_rate()
359 pll->id); in sam9x60_div_pll_get_rate()
409 pll->id = id; in sam9x60_clk_register_pll()
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/drivers/clk/
A Dclk_sandbox.c16 ulong id = clk_get_id(clk); in sandbox_clk_get_rate() local
24 return priv->rate[id]; in sandbox_clk_get_rate()
30 ulong id = clk_get_id(clk); in sandbox_clk_round_rate() local
60 priv->rate[id] = rate; in sandbox_clk_set_rate()
76 priv->enabled[id] = true; in sandbox_clk_enable()
133 .id = UCLASS_CLK,
144 if (id < 0 || id >= SANDBOX_CLK_ID_COUNT) in sandbox_clk_query_rate()
147 return priv->rate[id]; in sandbox_clk_query_rate()
154 if (id < 0 || id >= SANDBOX_CLK_ID_COUNT) in sandbox_clk_query_enable()
164 if (id < 0 || id >= SANDBOX_CLK_ID_COUNT) in sandbox_clk_query_requested()
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A Dclk_k210.c108 #define _DIVIFY(id) K210_CLK_DIV_##id argument
109 #define DIVIFY(id) _DIVIFY(id) argument
112 #define DIV(id, ...) DIVIFY(id), argument
188 #define _GATEIFY(id) K210_CLK_GATE_##id argument
189 #define GATEIFY(id) _GATEIFY(id) argument
192 #define GATE(id, ...) GATEIFY(id), argument
240 #define _MUXIFY(id) K210_CLK_MUX_##id argument
241 #define MUXIFY(id) _MUXIFY(id) argument
244 #define MUX_PARENTS(id, ...) MUXIFY(id), argument
357 CLK_MUX(id, name, MUXIFY(id), DIVIFY(id), GATEIFY(id))
[all …]
A Dclk_sandbox_test.c77 if (id < 0 || id >= SANDBOX_CLK_TEST_ID_COUNT) in sandbox_clk_test_get_rate()
80 return clk_get_rate(sbct->clkps[id]); in sandbox_clk_test_get_rate()
87 if (id < 0 || id >= SANDBOX_CLK_TEST_ID_COUNT) in sandbox_clk_test_round_rate()
90 return clk_round_rate(sbct->clkps[id], rate); in sandbox_clk_test_round_rate()
97 if (id < 0 || id >= SANDBOX_CLK_TEST_ID_COUNT) in sandbox_clk_test_set_rate()
100 return clk_set_rate(sbct->clkps[id], rate); in sandbox_clk_test_set_rate()
107 if (id < 0 || id >= SANDBOX_CLK_TEST_ID_COUNT) in sandbox_clk_test_enable()
110 return clk_enable(sbct->clkps[id]); in sandbox_clk_test_enable()
124 if (id < 0 || id >= SANDBOX_CLK_TEST_ID_COUNT) in sandbox_clk_test_disable()
127 return clk_disable(sbct->clkps[id]); in sandbox_clk_test_disable()
[all …]
A Dclk_zynq.c59 switch (id) { in zynq_clk_get_register()
158 if (id == gem0_clk) in zynq_clk_get_gem_rclk()
180 switch (id) { in zynq_clk_get_cpu_rate()
373 enum zynq_clk id = clk->id; in zynq_clk_get_rate() local
376 switch (id) { in zynq_clk_get_rate()
408 enum zynq_clk id = clk->id; in zynq_clk_set_rate() local
411 switch (id) { in zynq_clk_set_rate()
429 enum zynq_clk id = clk->id; in zynq_clk_get_rate() local
431 switch (id) { in zynq_clk_get_rate()
483 clk.id = i; in zynq_clk_dump()
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/drivers/soc/
A Dsoc_xilinx_zynqmp.c51 u32 id; member
64 .id = 0x04688093,
69 .id = 0x04689093,
74 .id = 0x04711093,
79 .id = 0x04710093,
84 .id = 0x04718093,
89 .id = 0x04721093,
95 .id = 0x04720093,
101 .id = 0x04739093,
106 .id = 0x04730093,
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/drivers/clk/tegra/
A Dtegra-car-clk.c19 clk->id); in tegra_car_clk_request()
34 int id = clk_id_to_pll_id(clk->id); in tegra_car_clk_request() local
36 if (clock_id_is_pll(id)) { in tegra_car_clk_request()
37 clk->id = id; in tegra_car_clk_request()
48 clk->id); in tegra_car_clk_get_rate()
68 clk->dev, clk->id); in tegra_car_clk_set_rate()
80 clk->id); in tegra_car_clk_enable()
85 clock_enable(clk->id); in tegra_car_clk_enable()
93 clk->id); in tegra_car_clk_disable()
98 clock_disable(clk->id); in tegra_car_clk_disable()
[all …]
/drivers/net/
A Ddwc_eth_qos_rockchip.c37 int id; member
424 (GRF_BIT(3 + (id) * 6) | GRF_CLR_BIT(4 + (id) * 6) | GRF_CLR_BIT(5 + (id) * 6))
426 (GRF_CLR_BIT(3 + (id) * 6) | GRF_CLR_BIT(4 + (id) * 6) | GRF_BIT(5 + (id) * 6))
428 #define RK3588_GMAC_CLK_RMII_MODE(id) GRF_BIT(5 * (id)) argument
431 #define RK3588_GMAC_CLK_SELET_CRU(id) GRF_BIT(5 * (id) + 4) argument
434 #define RK3588_GMAC_CLK_RMII_DIV2(id) GRF_BIT(5 * (id) + 2) argument
438 (GRF_CLR_BIT(5 * (id) + 2) | GRF_CLR_BIT(5 * (id) + 3))
440 (GRF_BIT(5 * (id) + 2) | GRF_BIT(5 * (id) + 3))
442 (GRF_CLR_BIT(5 * (id) + 2) | GRF_BIT(5 * (id) + 3))
452 u32 offset_con, id = data->id; in rk3588_set_to_rgmii() local
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/drivers/reset/
A Dreset-rockchip.c33 unsigned long id = reset_ctl->id; in rockchip_reset_request() local
36 id = priv->lut[id]; in rockchip_reset_request()
50 unsigned long id = reset_ctl->id; in rockchip_reset_assert() local
54 id = priv->lut[id]; in rockchip_reset_assert()
56 bank = id / ROCKCHIP_RESET_NUM_IN_REG; in rockchip_reset_assert()
57 offset = id % ROCKCHIP_RESET_NUM_IN_REG; in rockchip_reset_assert()
70 unsigned long id = reset_ctl->id; in rockchip_reset_deassert() local
74 id = priv->lut[id]; in rockchip_reset_deassert()
76 bank = id / ROCKCHIP_RESET_NUM_IN_REG; in rockchip_reset_deassert()
77 offset = id % ROCKCHIP_RESET_NUM_IN_REG; in rockchip_reset_deassert()
[all …]
A Dreset-uniphier.c20 unsigned int id; member
30 { .id = UNIPHIER_RESET_ID_END }
34 .id = (_id), \
41 .id = (_id), \
122 #define UNIPHIER_MIO_RESET_DMAC(id) \ argument
123 UNIPHIER_RESETX((id), 0x110, 17)
147 UNIPHIER_RESETX((id), 0x114, 19 + (ch))
150 UNIPHIER_RESETX((id), 0x114, 5 + (ch))
199 unsigned long id = reset_ctl->id; in uniphier_reset_update() local
205 if (p->id != id) in uniphier_reset_update()
[all …]
A Dsandbox-reset.c30 if (reset_ctl->id >= SANDBOX_RESET_SIGNALS) in sandbox_reset_request()
33 sbr->signals[reset_ctl->id].requested = true; in sandbox_reset_request()
43 sbr->signals[reset_ctl->id].requested = false; in sandbox_reset_free()
53 sbr->signals[reset_ctl->id].asserted = true; in sandbox_reset_assert()
64 sbr->signals[reset_ctl->id].asserted = false; in sandbox_reset_deassert()
97 .id = UCLASS_RESET,
109 debug("%s(dev=%p, id=%ld)\n", __func__, dev, id); in sandbox_reset_query()
111 if (id >= SANDBOX_RESET_SIGNALS) in sandbox_reset_query()
114 return sbr->signals[id].asserted; in sandbox_reset_query()
123 if (id >= SANDBOX_RESET_SIGNALS) in sandbox_reset_is_requested()
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/drivers/core/
A Duclass.c38 if (uc->uc_drv->id == key) in uclass_find()
64 id); in uclass_add()
153 uc = uclass_find(id); in uclass_get()
168 if (uclass_get(id, &uc)) in uclass_get_name()
231 ret = uclass_get(id, &uc); in uclass_find_device()
253 ret = uclass_get(id, &uc); in uclass_find_first_device()
284 ret = uclass_get(id, &uc); in uclass_find_device_by_namelen()
309 uc = uclass_find(id); in uclass_try_first_device()
349 ret = uclass_get(id, &uc); in uclass_find_device_by_seq()
376 ret = uclass_get(id, &uc); in uclass_find_device_by_of_offset()
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/drivers/clk/nuvoton/
A Dclk_npcm.c21 if (selector->parents[i].id == id) in clkid_to_clksel()
34 return selector->parents[i].id; in clksel_to_clkid()
46 if (pll->id == id) in npcm_clk_pll_get()
55 int id) in npcm_clk_selector_get() argument
61 if (selector->id == id) in npcm_clk_selector_get()
70 int id) in npcm_clk_divider_get() argument
76 if (divider->id == id) in npcm_clk_divider_get()
161 clkdiv, clk->id); in npcm_clk_set_div()
204 parent.id = pll->parent_id; in npcm_clk_get_pll_fout()
276 debug("%s: id %lu, parent %lu\n", __func__, clk->id, parent->id); in npcm_clk_set_parent()
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/drivers/net/pfe_eth/
A Dpfe_cmd.c28 int id; in pfe_command_pe() local
62 int id; in pfe_command_pe() local
90 int id; in pfe_command_pe() local
280 u32 id; in pfe_pe_status() local
293 for (id = CLASS0_ID; id < MAX_PE; id++) { in pfe_pe_status()
294 if (id >= TMU0_ID) { in pfe_pe_status()
295 if (id == TMU2_ID) in pfe_pe_status()
297 if (id == TMU0_ID) in pfe_pe_status()
301 if (id == CLASS0_ID) in pfe_pe_status()
326 if (id >= TMU0_ID) { in pfe_pe_status()
[all …]
/drivers/dma/
A Dsandbox-dma-test.c25 u32 id; member
60 dma->id = args->args[0]; in sandbox_dma_of_xlate()
62 uc = &ud->channels[dma->id]; in sandbox_dma_of_xlate()
64 if (dma->id == 1) in sandbox_dma_of_xlate()
66 else if (dma->id == 2) in sandbox_dma_of_xlate()
83 uc = &ud->channels[dma->id]; in sandbox_dma_request()
101 uc = &ud->channels[dma->id]; in sandbox_dma_rfree()
121 uc = &ud->channels[dma->id]; in sandbox_dma_enable()
141 uc = &ud->channels[dma->id]; in sandbox_dma_disable()
263 uc->id = i; in sandbox_dma_probe()
[all …]
/drivers/clk/meson/
A Dg12a.c154 switch (id) { in meson_set_gate_by_id()
177 switch (id) { in meson_set_gate_by_id()
245 switch (id) { in meson_div_get_rate()
304 switch (id) { in meson_div_set_rate()
369 __func__, id, meson_div_get_rate(clk, id)); in meson_div_set_rate()
444 switch (id) { in meson_mux_get_parent()
505 switch (id) { in meson_mux_set_parent()
554 __func__, id, meson_mux_get_parent(clk, id)); in meson_mux_set_parent()
644 switch (id) { in meson_mpll_get_rate()
701 switch (id) { in meson_pll_get_rate()
[all …]
A Dgxbb.c208 switch (id) { in meson_set_gate_by_id()
231 switch (id) { in meson_set_gate_by_id()
287 switch (id) { in meson_div_get_rate()
346 switch (id) { in meson_div_set_rate()
410 __func__, id, meson_div_get_rate(clk, id)); in meson_div_set_rate()
481 switch (id) { in meson_mux_get_parent()
542 switch (id) { in meson_mux_set_parent()
590 __func__, id, meson_mux_get_parent(clk, id)); in meson_mux_set_parent()
684 switch (id) { in meson_mpll_get_rate()
734 switch (id) { in meson_pll_get_rate()
[all …]
/drivers/usb/gadget/
A Dg_dnl.c219 int id, ret; in g_dnl_bind() local
224 id = usb_string_id(cdev); in g_dnl_bind()
226 if (id < 0) in g_dnl_bind()
227 return id; in g_dnl_bind()
228 g_dnl_string_defs[0].id = id; in g_dnl_bind()
232 if (id < 0) in g_dnl_bind()
233 return id; in g_dnl_bind()
235 g_dnl_string_defs[1].id = id; in g_dnl_bind()
242 if (id < 0) in g_dnl_bind()
243 return id; in g_dnl_bind()
[all …]

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