Searched refs:mclk (Results 1 – 5 of 5) sorted by relevance
565 ulong mclk; in tmio_sd_set_clk_rate() local568 mclk = tmio_sd_clk_get_rate(priv); in tmio_sd_set_clk_rate()570 divisor = DIV_ROUND_UP(mclk, mmc->clock); in tmio_sd_set_clk_rate()732 ulong mclk; in tmio_sd_probe() local777 mclk = tmio_sd_clk_get_rate(priv); in tmio_sd_probe()780 plat->cfg.f_min = mclk / in tmio_sd_probe()782 plat->cfg.f_max = mclk; in tmio_sd_probe()
375 u32 mclk; /* mmc framework required bus clock */ member863 host->mclk = 0; in msdc_set_mclk()940 host->mclk = hz; in msdc_set_mclk()977 if (host->mclk != clock || host->timing != mmc->selected_mode) in msdc_ops_set_ios()
40 int mclk[WM8994_MAX_AIF]; /* master clock frequency in Hz */ member437 rate = priv->mclk[0]; in configure_aif_clock()442 rate = priv->mclk[1]; in configure_aif_clock()511 priv->mclk[0] = freq; in wm8994_set_sysclk()520 priv->mclk[1] = freq; in wm8994_set_sysclk()
121 unsigned int mclk_to_picos(const unsigned int ctrl_num, unsigned int mclk) in mclk_to_picos() argument123 return get_memory_clk_period_ps(ctrl_num) * mclk; in mclk_to_picos()
659 struct clk mclk; member706 parent_rate = clk_get_rate(&clocks->mclk); in r9a06g032_clk_get_parent_rate()1086 return clk_get_by_name(dev, "mclk", &priv->mclk); in r9a06g032_clk_probe()
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