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Searched refs:mstr (Results 1 – 5 of 5) sorted by relevance

/drivers/ram/stm32mp1/
A Dstm32mp1_ddr.c88 DDRCTL_REG_REG(mstr),
752 switch (config->c_reg.mstr & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK) { in stm32mp1_ddr_init()
764 if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3) in stm32mp1_ddr_init()
766 else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2) { in stm32mp1_ddr_init()
771 } else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3) { in stm32mp1_ddr_init()
863 if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3) in stm32mp1_ddr_init()
895 if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3) in stm32mp1_ddr_init()
A Dstm32mp1_ddr.h41 u32 mstr; member
A Dstm32mp1_ddr_regs.h13 u32 mstr ; /* 0x0 Master*/ member
A Dstm32mp1_ram.c182 u32 reg = readl(&ctl->mstr) & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK; in get_data_bus_width()
A Dstm32mp1_tests.c939 switch (readl(&ctl->mstr) & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK) { in test_freq_pattern()

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