Home
last modified time | relevance | path

Searched refs:pll_con5 (Results 1 – 1 of 1) sorted by relevance

/drivers/clk/exynos/
A Dclk-pll.c79 u32 mdiv, pdiv, sdiv, pll_con3, pll_con5; in samsung_pll0831x_recalc_rate() local
84 pll_con5 = readl_relaxed(pll->con_reg + 8); in samsung_pll0831x_recalc_rate()
88 kdiv = (s16)((pll_con5 >> PLL0831X_KDIV_SHIFT) & PLL0831X_KDIV_MASK); in samsung_pll0831x_recalc_rate()

Completed in 4 milliseconds