rates (reference) in projects: drivers - OpenGrok search results

Searched refs:rates (Results 1 – 5 of 5) sorted by relevance

/drivers/clk/mvebu/
A D	armada-37xx-tbg.c	`55 ulong rates[NUM_TBG]; member 93 return priv->rates[clk->id]; in armada_37xx_tbg_clk_get_rate() 104 priv->rates[i]); in armada_37xx_tbg_clk_dump() 132 priv->rates[i] = (xtal * mult) / div; in armada_37xx_tbg_clk_probe()`
/drivers/clk/
A D	clk-uclass.c	`300 u32 *rates = NULL; in clk_set_default_rates() local 307 rates = calloc(num_rates, sizeof(u32)); in clk_set_default_rates() 308 if (!rates) in clk_set_default_rates() 311 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates); in clk_set_default_rates() 317 if (!rates[index]) in clk_set_default_rates() 359 ret = clk_set_rate(c, rates[index]); in clk_set_default_rates() 370 free(rates); in clk_set_default_rates()`
A D	Kconfig	`155 support changing clock rates, only querying them. 167 Add functionality to calculate new rates for K210 PLLs. Enabling this`
/drivers/spi/
A D	Kconfig	`5 protocol. Chips that support SPI can have data transfer rates`
/drivers/net/
A D	Kconfig	`806 rates from 10GE to 100GE. This could be present in some of the Xilinx`

Completed in 15 milliseconds