Searched refs:reg_width (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpio/ |
| A D | sh_pfc.c | 36 unsigned long reg_width) in gpio_read_raw_reg() argument
38 switch (reg_width) { in gpio_read_raw_reg()
53 unsigned long reg_width, in gpio_write_raw_reg() argument
56 switch (reg_width) { in gpio_write_raw_reg()
77 pos = dr->reg_width - (in_pos + 1); in gpio_read_bit()
83 dr->reg_width) >> pos) & 1; in gpio_read_bit()
91 pos = dr->reg_width - (in_pos + 1); in gpio_write_bit()
125 *posp = crp->reg_width; in config_reg_helper()
188 if (!data_reg->reg_width) in setup_data_reg()
222 if (!drp->reg_width) in setup_data_regs()
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| /drivers/reset/ |
| A D | reset-socfpga.c | 69 int reg_width = sizeof(u32); in socfpga_reset_assert() local
70 int bank = id / (reg_width * BITS_PER_BYTE); in socfpga_reset_assert()
71 int offset = id % (reg_width * BITS_PER_BYTE); in socfpga_reset_assert()
81 int reg_width = sizeof(u32); in socfpga_reset_deassert() local
82 int bank = id / (reg_width * BITS_PER_BYTE); in socfpga_reset_deassert()
83 int offset = id % (reg_width * BITS_PER_BYTE); in socfpga_reset_deassert()
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| /drivers/serial/ |
| A D | serial_s5p.c | 54 u8 reg_width; /* register width */ member
103 static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, u8 reg_width, in s5p_serial_baud() argument
114 else if (reg_width == 4) in s5p_serial_baud()
139 s5p_serial_baud(uart, plat->reg_width, uclk, baudrate); in s5p_serial_setbrg()
182 if (plat->reg_width == 4) in s5p_serial_getc()
196 if (plat->reg_width == 4) in s5p_serial_putc()
229 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); in s5p_serial_of_to_plat()
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| A D | serial_coreboot.c | 87 plat->reg_width = 4; /* coreboot sets bit_width to 0 */ in read_dbg2()
105 plat->reg_width = cb_info->regwidth; in coreboot_of_to_plat()
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| A D | ns16550.c | 112 } else if (plat->reg_width == 4) { in serial_out_dynamic()
132 } else if (plat->reg_width == 4) { in serial_in_dynamic()
474 info->reg_width = plat->reg_width; in ns16550_serial_getinfo()
553 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); in ns16550_serial_of_to_plat()
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| A D | sandbox.c | 211 .reg_width = 1, in sandbox_serial_getinfo()
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| A D | serial_pl01x.c | 290 info->reg_width = 4; in pl01x_serial_getinfo()
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| /drivers/pwm/ |
| A D | pwm-mtk.c | 88 reg_width = PWMDWIDTH, reg_thres = PWMTHRES; in mtk_pwm_set_config() local
123 reg_width = PWM45DWIDTH_FIXUP; in mtk_pwm_set_config()
131 mtk_pwm_w32(dev, channel, reg_width, cnt_period); in mtk_pwm_set_config()
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| /drivers/pinctrl/renesas/ |
| A D | pfc.c | 100 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width) in sh_pfc_read_raw_reg() argument
102 switch (reg_width) { in sh_pfc_read_raw_reg()
115 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, in sh_pfc_write_raw_reg() argument
118 switch (reg_width) { in sh_pfc_write_raw_reg()
172 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width); in sh_pfc_config_reg_helper()
175 *posp = crp->reg_width; in sh_pfc_config_reg_helper()
193 crp->reg, value, field, crp->reg_width, crp->field_width); in sh_pfc_write_config_reg()
198 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width); in sh_pfc_write_config_reg()
203 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data); in sh_pfc_write_config_reg()
215 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
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| A D | sh_pfc.h | 101 u8 reg_width, field_width; member
126 .reg = r, .reg_width = r_width, \
146 .reg = r, .reg_width = r_width, \
183 u8 reg_width; member
196 .reg = r, .reg_width = r_width + \
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