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Searched refs:regmap_write (Results 1 – 25 of 64) sorted by relevance

123

/drivers/net/mtk_eth/
A Dmtk_eth.c169 regmap_write(priv->ethsys_regmap, reg, val); in mtk_ethsys_rmw()
180 regmap_write(priv->infra_regmap, reg, val); in mtk_infra_rmw()
637 regmap_write(priv->xfi_pll_regmap, XFI_PLL_ANA_GLB8, in mtk_xfi_pll_enable()
649 regmap_write(priv->toprgu_regmap, 0xFC, 0x0000A004); in mtk_usxgmii_reset()
650 regmap_write(priv->toprgu_regmap, 0x18, 0x88F0A004); in mtk_usxgmii_reset()
651 regmap_write(priv->toprgu_regmap, 0xFC, 0x00000000); in mtk_usxgmii_reset()
652 regmap_write(priv->toprgu_regmap, 0x18, 0x88F00000); in mtk_usxgmii_reset()
653 regmap_write(priv->toprgu_regmap, 0x18, 0x00F00000); in mtk_usxgmii_reset()
656 regmap_write(priv->toprgu_regmap, 0xFC, 0x00005002); in mtk_usxgmii_reset()
657 regmap_write(priv->toprgu_regmap, 0x18, 0x88F05002); in mtk_usxgmii_reset()
[all …]
/drivers/phy/
A Dmeson-axg-mipi-dphy.c215 regmap_write(priv->regmap, MIPI_DSI_PHY_CTRL, 0x1); in phy_meson_axg_mipi_dphy_power_on()
216 regmap_write(priv->regmap, MIPI_DSI_PHY_CTRL, in phy_meson_axg_mipi_dphy_power_on()
233 regmap_write(priv->regmap, MIPI_DSI_CLK_TIM, in phy_meson_axg_mipi_dphy_power_on()
239 regmap_write(priv->regmap, MIPI_DSI_CLK_TIM1, in phy_meson_axg_mipi_dphy_power_on()
242 regmap_write(priv->regmap, MIPI_DSI_HS_TIM, in phy_meson_axg_mipi_dphy_power_on()
248 regmap_write(priv->regmap, MIPI_DSI_LP_TIM, in phy_meson_axg_mipi_dphy_power_on()
255 regmap_write(priv->regmap, MIPI_DSI_INIT_TIM, in phy_meson_axg_mipi_dphy_power_on()
257 regmap_write(priv->regmap, MIPI_DSI_WAKEUP_TIM, in phy_meson_axg_mipi_dphy_power_on()
259 regmap_write(priv->regmap, MIPI_DSI_LPOK_TIM, 0x7C); in phy_meson_axg_mipi_dphy_power_on()
277 regmap_write(priv->regmap, MIPI_DSI_CHAN_CTRL, 0); in phy_meson_axg_mipi_dphy_power_on()
[all …]
A Dmeson-g12a-usb3-pcie.c79 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_addr()
80 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_addr()
90 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_addr()
112 regmap_write(priv->regmap, PHY_R4, 0); in phy_g12a_usb3_pcie_cr_bus_read()
113 regmap_write(priv->regmap, PHY_R4, PHY_R4_PHY_CR_READ); in phy_g12a_usb3_pcie_cr_bus_read()
123 regmap_write(priv->regmap, PHY_R4, 0); in phy_g12a_usb3_pcie_cr_bus_read()
147 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_write()
148 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_write()
158 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_write()
166 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_write()
[all …]
A Dmeson-g12a-usb2.c194 regmap_write(priv->regmap, PHY_CTRL_R16, in phy_meson_g12a_usb2_init()
203 regmap_write(priv->regmap, PHY_CTRL_R17, in phy_meson_g12a_usb2_init()
225 regmap_write(priv->regmap, PHY_CTRL_R18, value); in phy_meson_g12a_usb2_init()
230 regmap_write(priv->regmap, PHY_CTRL_R16, in phy_meson_g12a_usb2_init()
239 regmap_write(priv->regmap, PHY_CTRL_R20, in phy_meson_g12a_usb2_init()
250 regmap_write(priv->regmap, PHY_CTRL_R4, in phy_meson_g12a_usb2_init()
258 regmap_write(priv->regmap, PHY_CTRL_R21, in phy_meson_g12a_usb2_init()
264 regmap_write(priv->regmap, PHY_CTRL_R3, in phy_meson_g12a_usb2_init()
271 regmap_write(priv->regmap, PHY_CTRL_R14, 0); in phy_meson_g12a_usb2_init()
272 regmap_write(priv->regmap, PHY_CTRL_R13, in phy_meson_g12a_usb2_init()
[all …]
A Dmeson-gxl-usb2.c114 regmap_write(priv->regmap, U2P_R0, val); in phy_meson_gxl_usb2_reset()
118 regmap_write(priv->regmap, U2P_R0, val); in phy_meson_gxl_usb2_reset()
151 regmap_write(priv->regmap, U2P_R0, val); in phy_meson_gxl_usb2_set_mode()
167 regmap_write(priv->regmap, U2P_R0, val); in phy_meson_gxl_usb2_power_on()
183 regmap_write(priv->regmap, U2P_R0, val); in phy_meson_gxl_usb2_power_off()
A Dmeson-axg-mipi-pcie-analog.c98 regmap_write(priv->regmap, HHI_MIPI_CNTL1, 0x001e); in phy_dsi_analog_enable()
100 regmap_write(priv->regmap, HHI_MIPI_CNTL2, in phy_dsi_analog_enable()
137 regmap_write(priv->regmap, HHI_MIPI_CNTL1, 0x6); in phy_dsi_analog_disable()
139 regmap_write(priv->regmap, HHI_MIPI_CNTL2, 0x00200000); in phy_dsi_analog_disable()
/drivers/watchdog/
A Dxilinx_wwdt.c57 regmap_write(wdt->regs, XWT_WWDT_MWR_OFFSET, XWT_WWDT_MWR_MASK); in xlnx_wwdt_reset()
61 regmap_write(wdt->regs, XWT_WWDT_ESR_OFFSET, esr); in xlnx_wwdt_reset()
64 regmap_write(wdt->regs, XWT_WWDT_ESR_OFFSET, esr); in xlnx_wwdt_reset()
79 regmap_write(wdt->regs, XWT_WWDT_MWR_OFFSET, XWT_WWDT_MWR_MASK); in xlnx_wwdt_stop()
80 regmap_write(wdt->regs, XWT_WWDT_ESR_OFFSET, ~(u32)XWT_WWDT_ESR_WEN_MASK); in xlnx_wwdt_stop()
130 regmap_write(wdt->regs, XWT_WWDT_MWR_OFFSET, XWT_WWDT_MWR_MASK); in xlnx_wwdt_start()
131 regmap_write(wdt->regs, XWT_WWDT_ESR_OFFSET, ~(u32)XWT_WWDT_ESR_WEN_MASK); in xlnx_wwdt_start()
134 regmap_write(wdt->regs, XWT_WWDT_FWR_OFFSET, 0); /* No pre-timeout */ in xlnx_wwdt_start()
135 regmap_write(wdt->regs, XWT_WWDT_SWR_OFFSET, (u32)count); in xlnx_wwdt_start()
136 regmap_write(wdt->regs, XWT_WWDT_FCR_OFFSET, 0); in xlnx_wwdt_start()
[all …]
/drivers/net/ti/
A Dicssg_classifier.c219 regmap_write(miig_rt, offset, val); in rx_class_ft1_set_start_len()
228 regmap_write(miig_rt, offset, addr_to_da0(addr)); in rx_class_ft1_set_da()
230 regmap_write(miig_rt, offset, addr_to_da1(addr)); in rx_class_ft1_set_da()
239 regmap_write(miig_rt, offset, addr_to_da0(addr)); in rx_class_ft1_set_da_mask()
241 regmap_write(miig_rt, offset, addr_to_da1(addr)); in rx_class_ft1_set_da_mask()
270 regmap_write(miig_rt, offset, data); in rx_class_set_and()
279 regmap_write(miig_rt, offset, data); in rx_class_set_or()
284 regmap_write(miig_rt, MAC_INTERFACE_0, addr_to_da0(mac)); in icssg_class_set_host_mac_addr()
313 regmap_write(miig_rt, offset, data); in icssg_class_disable_n()
339 regmap_write(miig_rt, offs[slice].rx_class_cfg2, 0); in icssg_class_disable()
[all …]
A Dicssg_config.c118 regmap_write(mii_rt, txcfg_reg, txcfg); in icssg_config_mii_init()
119 regmap_write(mii_rt, pcnt_reg, 0x1); in icssg_config_mii_init()
136 regmap_write(miig_rt, ICSSG_QUEUE_RESET_OFFSET, queue); in icssg_miig_queues_init()
141 regmap_write(miig_rt, ICSSG_QUEUE_RESET_OFFSET, queue); in icssg_miig_queues_init()
144 regmap_write(miig_rt, ICSSG_QUEUE_RESET_OFFSET, in icssg_miig_queues_init()
175 regmap_write(miig_rt, ICSSG_QUEUE_OFFSET + 4 * queue, in icssg_miig_queues_init()
293 regmap_write(prueth->miig_rt, FDB_GEN_CFG2, 0); in icssg_init_emac_mode()
A Dicss_mii_rt.h141 regmap_write(mii_rt, PRUSS_MII_RT_TX_IPG0, ipg); in icssg_mii_update_ipg()
145 regmap_write(mii_rt, PRUSS_MII_RT_TX_IPG1, ipg); in icssg_mii_update_ipg()
146 regmap_write(mii_rt, PRUSS_MII_RT_TX_IPG0, val); in icssg_mii_update_ipg()
/drivers/net/
A Ddwc_eth_qos_rockchip.c155 regmap_write(data->grf, reg, val); in rk3528_set_gmac_speed()
212 regmap_write(data->grf, con0, in rk3568_set_to_rgmii()
216 regmap_write(data->grf, con1, in rk3568_set_to_rgmii()
316 regmap_write(data->php_grf, offset_con, in rk3576_set_to_rgmii()
318 regmap_write(data->php_grf, offset_con + 0x4, in rk3576_set_to_rgmii()
322 regmap_write(data->php_grf, offset_con, in rk3576_set_to_rgmii()
325 regmap_write(data->php_grf, offset_con + 0x4, in rk3576_set_to_rgmii()
379 regmap_write(data->grf, offset_con, val); in rk3576_set_gmac_speed()
399 regmap_write(data->grf, offset_con, val); in rk3576_set_clock_selection()
463 regmap_write(data->grf, RK3588_GRF_GMAC_CON7, in rk3588_set_to_rgmii()
[all …]
/drivers/mfd/
A Datmel-smc.c252 regmap_write(regmap, ATMEL_SMC_SETUP(cs), conf->setup); in atmel_smc_cs_conf_apply()
253 regmap_write(regmap, ATMEL_SMC_PULSE(cs), conf->pulse); in atmel_smc_cs_conf_apply()
254 regmap_write(regmap, ATMEL_SMC_CYCLE(cs), conf->cycle); in atmel_smc_cs_conf_apply()
255 regmap_write(regmap, ATMEL_SMC_MODE(cs), conf->mode); in atmel_smc_cs_conf_apply()
273 regmap_write(regmap, ATMEL_HSMC_SETUP(layout, cs), conf->setup); in atmel_hsmc_cs_conf_apply()
274 regmap_write(regmap, ATMEL_HSMC_PULSE(layout, cs), conf->pulse); in atmel_hsmc_cs_conf_apply()
275 regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle); in atmel_hsmc_cs_conf_apply()
276 regmap_write(regmap, ATMEL_HSMC_TIMINGS(layout, cs), conf->timings); in atmel_hsmc_cs_conf_apply()
277 regmap_write(regmap, ATMEL_HSMC_MODE(layout, cs), conf->mode); in atmel_hsmc_cs_conf_apply()
/drivers/misc/
A Drockchip-io-domain.c71 regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val0); in rk3568_iodomain_write()
72 regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val1); in rk3568_iodomain_write()
86 regmap_write(grf, RK3568_PMU_GRF_IO_VSEL0, val0); in rk3568_iodomain_write()
87 regmap_write(grf, RK3568_PMU_GRF_IO_VSEL1, val1); in rk3568_iodomain_write()
107 return regmap_write(grf, offset, val); in rockchip_iodomain_write()
120 ret = regmap_write(grf, PX30_IO_VSEL, val); in px30_iodomain_write()
136 ret = regmap_write(grf, RK3308_SOC_CON0, val); in rk3308_iodomain_write()
152 ret = regmap_write(grf, RK3328_SOC_CON4, val); in rk3328_iodomain_write()
168 ret = regmap_write(grf, RK3399_PMUGRF_CON0, val); in rk3399_pmu_iodomain_write()
/drivers/remoteproc/
A Dadi_sc5xx_rproc.c176 regmap_write(priv->rcu, ADI_RCU_REG_CRSTAT, 1 << coreid); in sharc_reset()
180 regmap_write(priv->rcu, ADI_RCU_REG_SIDIS, val | (1 << (coreid - 1))); in sharc_reset()
190 regmap_write(priv->rcu, ADI_RCU_REG_CRCTL, val | (1 << coreid)); in sharc_reset()
198 regmap_write(priv->rcu, ADI_RCU_REG_SIDIS, val & ~(1 << (coreid - 1))); in sharc_reset()
204 regmap_write(priv->rcu, ADI_RCU_REG_CRCTL, val & ~(1 << coreid)); in sharc_reset()
215 regmap_write(priv->rcu, priv->svect_offset, priv->load_addr); in sharc_start()
220 regmap_write(priv->rcu, ADI_RCU_REG_MSG_CLR, RCU0_MSG_C0IDLE << priv->coreid); in sharc_start()
223 regmap_write(priv->rcu, ADI_RCU_REG_MSG_SET, RCU0_MSG_C1ACTIVATE << (priv->coreid - 1)); in sharc_start()
/drivers/phy/rockchip/
A Dphy-rockchip-snps-pcie3.c74 regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, GRF_PCIE30PHY_DA_OCM); in rockchip_p3phy_rk3568_init()
83 regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6, in rockchip_p3phy_rk3568_init()
85 regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON1, in rockchip_p3phy_rk3568_init()
88 regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6, in rockchip_p3phy_rk3568_init()
117 regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, in rockchip_p3phy_rk3588_init()
131 regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, in rockchip_p3phy_rk3588_init()
137 regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON, in rockchip_p3phy_rk3588_init()
/drivers/spi/
A Dairoha_snfi_spi.c235 err = regmap_write(priv->regmap_ctrl, REG_SPI_CTRL_OPFIFO_WR, in airoha_snand_set_fifo_op()
269 err = regmap_write(priv->regmap_ctrl, in airoha_snand_write_data_to_fifo()
312 err = regmap_write(priv->regmap_ctrl, in airoha_snand_read_data_from_fifo()
330 err = regmap_write(priv->regmap_ctrl, in airoha_snand_set_mode()
335 err = regmap_write(priv->regmap_ctrl, in airoha_snand_set_mode()
347 err = regmap_write(priv->regmap_ctrl, in airoha_snand_set_mode()
352 err = regmap_write(priv->regmap_ctrl, in airoha_snand_set_mode()
359 err = regmap_write(priv->regmap_ctrl, in airoha_snand_set_mode()
365 err = regmap_write(priv->regmap_ctrl, in airoha_snand_set_mode()
370 err = regmap_write(priv->regmap_ctrl, in airoha_snand_set_mode()
[all …]
/drivers/pinctrl/rockchip/
A Dpinctrl-rk3588.c38 ret = regmap_write(regmap, reg, data); in rk3588_set_mux()
45 ret = regmap_write(regmap, reg0, data); in rk3588_set_mux()
51 regmap_write(regmap, reg0, data); in rk3588_set_mux()
56 ret = regmap_write(regmap, reg, data); in rk3588_set_mux()
66 return regmap_write(regmap, reg, data); in rk3588_set_mux()
274 return regmap_write(regmap, reg, data); in rk3588_set_pull()
291 return regmap_write(regmap, reg, data); in rk3588_set_drive()
308 return regmap_write(regmap, reg, data); in rk3588_set_schmitt()
A Dpinctrl-px30.c94 ret = regmap_write(regmap, reg, data); in px30_set_mux()
151 ret = regmap_write(regmap, reg, data); in px30_set_pull()
220 ret = regmap_write(regmap, reg, data); in px30_set_drive()
226 ret = regmap_write(regmap, reg, temp); in px30_set_drive()
254 ret = regmap_write(regmap, reg, data); in px30_set_drive()
301 return regmap_write(regmap, reg, data); in px30_set_schmitt()
A Dpinctrl-rk3399.c73 ret = regmap_write(regmap, reg, data); in rk3399_set_mux()
130 ret = regmap_write(regmap, reg, data); in rk3399_set_pull()
190 ret = regmap_write(regmap, reg, data); in rk3399_set_drive()
196 ret = regmap_write(regmap, reg, temp); in rk3399_set_drive()
224 ret = regmap_write(regmap, reg, data); in rk3399_set_drive()
A Dpinctrl-rv1108.c101 ret = regmap_write(regmap, reg, data); in rv1108_set_mux()
155 ret = regmap_write(regmap, reg, data); in rv1108_set_pull()
207 ret = regmap_write(regmap, reg, data); in rv1108_set_drive()
253 return regmap_write(regmap, reg, data); in rv1108_set_schmitt()
A Dpinctrl-rk3368.c33 ret = regmap_write(regmap, reg, data); in rk3368_set_mux()
88 ret = regmap_write(regmap, reg, data); in rk3368_set_pull()
139 ret = regmap_write(regmap, reg, data); in rk3368_set_drive()
/drivers/timer/
A Dxilinx-timer.c57 regmap_write(priv->regs, TIMER_LOADREG_OFFSET, 0); in xilinx_timer_probe()
58 regmap_write(priv->regs, TIMER_CONTROL_OFFSET, TIMER_RESET); in xilinx_timer_probe()
59 regmap_write(priv->regs, TIMER_CONTROL_OFFSET, in xilinx_timer_probe()
/drivers/clk/meson/
A Dg12a.c870 regmap_write(priv->map, HHI_PCIE_PLL_CNTL0, 0x20090496); in meson_pcie_pll_set_rate()
871 regmap_write(priv->map, HHI_PCIE_PLL_CNTL0, 0x30090496); in meson_pcie_pll_set_rate()
872 regmap_write(priv->map, HHI_PCIE_PLL_CNTL1, 0x00000000); in meson_pcie_pll_set_rate()
873 regmap_write(priv->map, HHI_PCIE_PLL_CNTL2, 0x00001100); in meson_pcie_pll_set_rate()
874 regmap_write(priv->map, HHI_PCIE_PLL_CNTL3, 0x10058e00); in meson_pcie_pll_set_rate()
875 regmap_write(priv->map, HHI_PCIE_PLL_CNTL4, 0x000100c0); in meson_pcie_pll_set_rate()
876 regmap_write(priv->map, HHI_PCIE_PLL_CNTL5, 0x68000048); in meson_pcie_pll_set_rate()
877 regmap_write(priv->map, HHI_PCIE_PLL_CNTL5, 0x68000068); in meson_pcie_pll_set_rate()
879 regmap_write(priv->map, HHI_PCIE_PLL_CNTL4, 0x008100c0); in meson_pcie_pll_set_rate()
991 regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0); in meson_clk_probe()
[all …]
/drivers/clk/microchip/
A Dmpfs_clk_periph.c70 regmap_write(periph_hw->regmap, REG_SUBBLK_RESET_CR, reg); in mpfs_periph_clk_enable()
74 regmap_write(periph_hw->regmap, REG_SUBBLK_CLOCK_CR, reg); in mpfs_periph_clk_enable()
89 regmap_write(periph_hw->regmap, REG_SUBBLK_RESET_CR, reg); in mpfs_periph_clk_disable()
93 regmap_write(periph_hw->regmap, REG_SUBBLK_CLOCK_CR, reg); in mpfs_periph_clk_disable()
/drivers/pinctrl/broadcom/
A Dpinctrl-bcm6838.c77 regmap_write(priv->regmap, hw->port_blk_data1, 0); in bcm6838_pinctrl_pinmux_set()
80 regmap_write(priv->regmap, hw->port_blk_data2, data); in bcm6838_pinctrl_pinmux_set()
81 regmap_write(priv->regmap, hw->port_command, BCM6838_CMD_LOAD_MUX); in bcm6838_pinctrl_pinmux_set()

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