Searched refs:saved_timing (Results 1 – 3 of 3) sorted by relevance
179 struct dram_timing_info *saved_timing = (struct dram_timing_info *)saved_timing_base; in dram_config_save() local182 saved_timing->ddrc_cfg_num = timing_info->ddrc_cfg_num; in dram_config_save()183 saved_timing->ddrphy_cfg_num = timing_info->ddrphy_cfg_num; in dram_config_save()184 saved_timing->ddrphy_trained_csr_num = timing_info->ddrphy_trained_csr_num; in dram_config_save()185 saved_timing->ddrphy_pie_num = timing_info->ddrphy_pie_num; in dram_config_save()189 saved_timing->fsp_table[i] = timing_info->fsp_table[i]; in dram_config_save()195 saved_timing->ddrc_cfg = cfg; in dram_config_save()203 saved_timing->ddrphy_cfg = cfg; in dram_config_save()211 saved_timing->ddrphy_trained_csr = cfg; in dram_config_save()219 saved_timing->ddrphy_pie = cfg; in dram_config_save()
218 struct dram_timing_info2 *saved_timing = (struct dram_timing_info2 *)saved_timing_base; in save_dram_config() local221 saved_timing->ctl_cfg_num = timing_info->ctl_cfg_num; in save_dram_config()222 saved_timing->phy_f1_cfg_num = timing_info->phy_f1_cfg_num; in save_dram_config()223 saved_timing->phy_f2_cfg_num = timing_info->phy_f2_cfg_num; in save_dram_config()227 saved_timing->fsp_table[i] = timing_info->fsp_table[i]; in save_dram_config()233 saved_timing->ctl_cfg = cfg; in save_dram_config()241 saved_timing->phy_f1_cfg = cfg; in save_dram_config()249 saved_timing->phy_f2_cfg = cfg; in save_dram_config()
341 struct dram_timing_info *saved_timing; in ddr_init() local394 saved_timing = (struct dram_timing_info *)CONFIG_SAVED_DRAM_TIMING_BASE; in ddr_init()395 saved_timing->fsp_cfg = fsp; in ddr_init()396 saved_timing->fsp_cfg_num = dram_timing->fsp_cfg_num; in ddr_init()397 if (saved_timing->fsp_cfg_num) { in ddr_init()398 memcpy(saved_timing->fsp_cfg, dram_timing->fsp_cfg, in ddr_init()401 save_trained_mr12_14(saved_timing->fsp_cfg[0].mr_cfg, in ddr_init()402 ARRAY_SIZE(saved_timing->fsp_cfg[0].mr_cfg), mr12, mr14); in ddr_init()407 if (saved_timing->fsp_cfg_num > 1) in ddr_init()408 update_mr_fsp_op0(saved_timing->fsp_cfg[1].mr_cfg, in ddr_init()[all …]
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