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Searched refs:sdiv (Results 1 – 4 of 4) sorted by relevance

/drivers/clk/exynos/
A Dclk-pll.c46 u32 mdiv, pdiv, sdiv, pll_con3; in samsung_pll0822x_recalc_rate() local
52 sdiv = (pll_con3 >> PLL0822X_SDIV_SHIFT) & PLL0822X_SDIV_MASK; in samsung_pll0822x_recalc_rate()
55 do_div(fvco, (pdiv << sdiv)); in samsung_pll0822x_recalc_rate()
79 u32 mdiv, pdiv, sdiv, pll_con3, pll_con5; in samsung_pll0831x_recalc_rate() local
87 sdiv = (pll_con3 >> PLL0831X_SDIV_SHIFT) & PLL0831X_SDIV_MASK; in samsung_pll0831x_recalc_rate()
91 do_div(fvco, (pdiv << sdiv)); in samsung_pll0831x_recalc_rate()
A Dclk-exynos7420.c77 unsigned long mdiv, sdiv, pdiv; in pll145x_get_rate() local
82 sdiv = (pll_con1 >> PLL145X_SDIV_SHIFT) & PLL145X_SDIV_MASK; in pll145x_get_rate()
85 do_div(fvco, (pdiv << sdiv)); in pll145x_get_rate()
/drivers/clk/imx/
A Dclk-pll14xx.c60 .sdiv = (_s), \
68 .sdiv = (_s), \
133 u32 mdiv, pdiv, sdiv, pll_div; in clk_pll1416x_recalc_rate() local
138 sdiv = (pll_div & SDIV_MASK) >> SDIV_SHIFT; in clk_pll1416x_recalc_rate()
141 do_div(fvco, pdiv << sdiv); in clk_pll1416x_recalc_rate()
157 sdiv = (pll_div_ctl0 & SDIV_MASK) >> SDIV_SHIFT; in clk_pll1443x_recalc_rate()
164 do_div(fvco, pdiv << sdiv); in clk_pll1443x_recalc_rate()
232 tmp |= rate->sdiv << SDIV_SHIFT; in clk_pll1416x_set_rate()
252 (rate->sdiv << SDIV_SHIFT); in clk_pll1416x_set_rate()
298 tmp |= rate->sdiv << SDIV_SHIFT; in clk_pll1443x_set_rate()
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A Dclk.h34 unsigned int sdiv; member

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