Home
last modified time | relevance | path

Searched refs:spd_data (Results 1 – 7 of 7) sorted by relevance

/drivers/ddr/marvell/a38x/
A Dmv_ddr_spd.c16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data) in mv_ddr_spd_supported_cls_calc() argument
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7; in mv_ddr_spd_supported_cls_calc()
24 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
32 if (spd_data->all_bytes[byte] & (1 << bit)) in mv_ddr_spd_supported_cls_calc()
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB + in mv_ddr_spd_timing_calc()
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 + in mv_ddr_spd_timing_calc()
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 + in mv_ddr_spd_timing_calc()
100 calc_val = (spd_data->byte_fields.byte_29 + in mv_ddr_spd_timing_calc()
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 + in mv_ddr_spd_timing_calc()
[all …]
A Dmv_ddr_spd.h283 int mv_ddr_spd_timing_calc(union mv_ddr_spd_data *spd_data, unsigned int timing_data[]);
284 enum mv_ddr_dev_width mv_ddr_spd_dev_width_get(union mv_ddr_spd_data *spd_data);
285 enum mv_ddr_die_capacity mv_ddr_spd_die_capacity_get(union mv_ddr_spd_data *spd_data);
286 unsigned char mv_ddr_spd_mem_mirror_get(union mv_ddr_spd_data *spd_data);
287 unsigned char mv_ddr_spd_cs_bit_mask_get(union mv_ddr_spd_data *spd_data);
288 unsigned char mv_ddr_spd_dev_type_get(union mv_ddr_spd_data *spd_data);
289 unsigned char mv_ddr_spd_module_type_get(union mv_ddr_spd_data *spd_data);
290 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data);
292 enum mv_ddr_pkg_rank mv_ddr_spd_pri_bus_width_get(union mv_ddr_spd_data *spd_data);
293 enum mv_ddr_pkg_rank mv_ddr_spd_bus_width_ext_get(union mv_ddr_spd_data *spd_data);
A Dmv_ddr_topology.c62 val = mv_ddr_spd_dev_type_get(&tm->spd_data); in mv_ddr_topology_map_update()
69 if (mv_ddr_spd_timing_calc(&tm->spd_data, tm->timing_data) > 0) { in mv_ddr_topology_map_update()
75 iface_params->bus_width = mv_ddr_spd_dev_width_get(&tm->spd_data); in mv_ddr_topology_map_update()
78 iface_params->memory_size = mv_ddr_spd_die_capacity_get(&tm->spd_data); in mv_ddr_topology_map_update()
84 val = mv_ddr_spd_cs_bit_mask_get(&tm->spd_data); in mv_ddr_topology_map_update()
89 val = mv_ddr_spd_module_type_get(&tm->spd_data); in mv_ddr_topology_map_update()
104 val = mv_ddr_spd_mem_mirror_get(&tm->spd_data); in mv_ddr_topology_map_update()
118 mv_ddr_spd_supported_cls_calc(&tm->spd_data); in mv_ddr_topology_map_update()
153 tm->spd_data.byte_fields.byte_13.bit_fields.primary_bus_width = MV_DDR_PRI_BUS_WIDTH_32; in mv_ddr_bus_bit_mask_get()
155 enum mv_ddr_pri_bus_width pri_bus_width = mv_ddr_spd_pri_bus_width_get(&tm->spd_data); in mv_ddr_bus_bit_mask_get()
[all …]
A Dddr_topology_def.h125 union mv_ddr_spd_data spd_data; member
/drivers/ddr/marvell/axp/
A Dddr3_spd.c188 extern u8 spd_data[SPD_SIZE];
255 memset(spd_data, 0, SPD_SIZE * sizeof(u8)); in ddr3_spd_init()
279 switch (spd_data[SPD_MODULE_TYPE_BYTE]) { in ddr3_spd_init()
370 spd_data[SPD_MTB_DIVISOR_BYTE]; in ddr3_spd_init()
400 (spd_data[SPD_SUP_CAS_LAT_MSB_BYTE] << 8) | in ddr3_spd_init()
401 spd_data[SPD_SUP_CAS_LAT_LSB_BYTE]; in ddr3_spd_init()
427 spd_data[SPD_TRRD_BYTE] * time_base; in ddr3_spd_init()
472 spd_data[SPD_TFAW_LSB_BYTE]; in ddr3_spd_init()
483 spd_data[SPD_RDIMM_RC_BYTE + rc / 2] & in ddr3_spd_init()
490 vendor_low = spd_data[66]; in ddr3_spd_init()
[all …]
A Dddr3_axp_vars.h90 u8 spd_data[SPD_SIZE] = { variable
/drivers/ram/octeon/
A Ddimm_spd_eeprom.c86 u8 *spd_data = dimm_config->spd_data[dimm_index]; in validate_spd_checksum_ddr4() local
91 if (spd_data[0] & 0x80) in validate_spd_checksum_ddr4()
94 crc_comp = ddr3_crc16(spd_data, crc_bytes); in validate_spd_checksum_ddr4()
96 if (spd_data[126] == (crc_comp & 0xff) && in validate_spd_checksum_ddr4()
97 spd_data[127] == (crc_comp >> 8)) in validate_spd_checksum_ddr4()
102 twsi_addr, crc_comp, spd_data[127], spd_data[126]); in validate_spd_checksum_ddr4()
155 return dimm_config->spd_data[dimm_index][spd_field]; in read_spd()
165 u8 *spd_data; in read_spd_init() local
172 spd_data = dimm_config->spd_data[dimm_index]; in read_spd_init()
180 ret = dm_i2c_read(dev_i2c, 0, spd_data, SPD_EEPROM_SIZE); in read_spd_init()

Completed in 19 milliseconds