Searched refs:srcsel (Results 1 – 2 of 2) sorted by relevance
| /drivers/clk/ |
| A D | clk_zynqmp.c | 426 u32 clk_ctrl, div, srcsel; in zynqmp_clk_get_cpu_rate() local
440 pll = pll_src[ACPU_CLK_SRC][srcsel]; in zynqmp_clk_get_cpu_rate()
450 u32 clk_ctrl, div, srcsel; in zynqmp_clk_get_ddr_rate() local
464 pll = pll_src[DDR_CLK_SRC][srcsel]; in zynqmp_clk_get_ddr_rate()
474 u32 clk_ctrl, srcsel; in zynqmp_clk_get_dll_rate() local
486 pll = pll_src[DLL_CLK_SRC][srcsel]; in zynqmp_clk_get_dll_rate()
498 u32 clk_ctrl, div0, srcsel; in zynqmp_clk_get_peripheral_rate() local
538 u32 clk_ctrl, div0, srcsel; in zynqmp_clk_get_crf_crl_rate() local
558 pll = pll_src[WDT_CLK_SRC][srcsel]; in zynqmp_clk_get_crf_crl_rate()
574 pll = pll_src[GPU_CLK_SRC][srcsel]; in zynqmp_clk_get_crf_crl_rate()
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| A D | clk_zynq.c | 105 u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >> CLK_CTRL_SRCSEL_SHIFT; in zynq_clk_get_cpu_pll() local
107 switch (srcsel) { in zynq_clk_get_cpu_pll()
120 u32 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >> CLK_CTRL_SRCSEL_SHIFT; in zynq_clk_get_peripheral_pll() local
122 switch (srcsel) { in zynq_clk_get_peripheral_pll()
156 u32 clk_ctrl, srcsel; in zynq_clk_get_gem_rclk() local
163 srcsel = (clk_ctrl & CLK_CTRL_SRCSEL_MASK) >> CLK_CTRL_SRCSEL_SHIFT; in zynq_clk_get_gem_rclk()
164 if (srcsel) in zynq_clk_get_gem_rclk()
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