| /drivers/video/nexell/soc/ |
| A D | s5pxx18_soc_dpc.c | 507 temp = (u32)(temp | (delay_rgb_pvd << delayrgb_pos)); in nx_dpc_set_delay() 556 temp = (u32)(temp | in nx_dpc_set_dither() 635 temp = (u32)(temp | (ycorder << ycorder_pos)); in nx_dpc_set_mode() 649 temp = (u32)(temp | ((format & 0xf) << format_pos)); in nx_dpc_set_mode() 658 temp = (u32)(temp | (clock << padclksel_pos)); in nx_dpc_set_mode() 751 temp &= ~intpend; in nx_dpc_set_hsync() 816 temp &= ~intpend; in nx_dpc_set_vsync() 1312 u32 temp; in nx_dpc_set_ycorder() local 1316 temp = (u16)(temp | (ycorder << ycorder_pos)); in nx_dpc_set_ycorder() 1408 temp = (u16)(temp | (u16)ntsc_ecmda_table[vbs]); in nx_dpc_set_video_encoder_mode() [all …]
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| /drivers/phy/ |
| A D | meson-axg-mipi-dphy.c | 207 unsigned long temp; in phy_meson_axg_mipi_dphy_power_on() local 231 temp = temp * 8 * 10; in phy_meson_axg_mipi_dphy_power_on() 234 DIV_ROUND_UP(priv->config.clk_trail, temp) | in phy_meson_axg_mipi_dphy_power_on() 236 priv->config.hs_trail, temp) << 8) | in phy_meson_axg_mipi_dphy_power_on() 240 DIV_ROUND_UP(priv->config.clk_pre, temp)); in phy_meson_axg_mipi_dphy_power_on() 243 DIV_ROUND_UP(priv->config.hs_exit, temp) | in phy_meson_axg_mipi_dphy_power_on() 244 (DIV_ROUND_UP(priv->config.hs_trail, temp) << 8) | in phy_meson_axg_mipi_dphy_power_on() 249 DIV_ROUND_UP(priv->config.lpx, temp) | in phy_meson_axg_mipi_dphy_power_on() 250 (DIV_ROUND_UP(priv->config.ta_sure, temp) << 8) | in phy_meson_axg_mipi_dphy_power_on() 251 (DIV_ROUND_UP(priv->config.ta_go, temp) << 16) | in phy_meson_axg_mipi_dphy_power_on() [all …]
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| /drivers/usb/host/ |
| A D | ohci-hcd.c | 362 __u32 temp; in ohci_dump_status() local 365 if (temp != 0x10) in ohci_dump_status() 366 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f)); in ohci_dump_status() 378 temp & OHCI_CTRL_CBSR in ohci_dump_status() 408 __u32 temp, ndp, i; in ohci_dump_roothub() local 411 ndp = (temp & RH_A_NDP); in ohci_dump_roothub() 427 temp, in ohci_dump_roothub() 429 (temp & RH_B_DR) in ohci_dump_roothub() 433 temp, in ohci_dump_roothub() 447 temp, in ohci_dump_roothub() [all …]
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| /drivers/ddr/marvell/a38x/ |
| A D | xor.c | 168 u32 temp; in mv_xor_mem_init() local 185 temp = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))); in mv_xor_mem_init() 186 temp &= ~XEXCR_OPERATION_MODE_MASK; in mv_xor_mem_init() 187 temp |= XEXCR_OPERATION_MODE_MEM_INIT; in mv_xor_mem_init() 188 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), temp); in mv_xor_mem_init() 398 u32 temp; in mv_xor_transfer() local 415 temp = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))); in mv_xor_transfer() 416 temp &= ~XEXCR_OPERATION_MODE_MASK; in mv_xor_transfer() 426 temp |= XEXCR_OPERATION_MODE_XOR; in mv_xor_transfer() 435 temp |= XEXCR_OPERATION_MODE_DMA; in mv_xor_transfer() [all …]
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| A D | ddr3_training_pbs.c | 53 u8 temp = 0; in ddr3_tip_pbs() local 439 (temp > in ddr3_tip_pbs() 441 temp : in ddr3_tip_pbs() 444 (temp < in ddr3_tip_pbs() 446 temp : in ddr3_tip_pbs() 452 temp; in ddr3_tip_pbs() 670 (temp > in ddr3_tip_pbs() 676 (temp < in ddr3_tip_pbs() 686 temp; in ddr3_tip_pbs() 845 temp, in ddr3_tip_pbs() [all …]
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| A D | ddr3_training_centralization.c | 539 u32 temp = 0; in ddr3_tip_special_rx() local 660 &temp)); in ddr3_tip_special_rx() 661 temp = (temp + 0xa > 31) ? in ddr3_tip_special_rx() 662 (31) : (temp + 0xa); in ddr3_tip_special_rx() 670 temp)); in ddr3_tip_special_rx() 684 &temp)); in ddr3_tip_special_rx() 685 temp += 0xa; in ddr3_tip_special_rx() 691 temp)); in ddr3_tip_special_rx() 697 &temp)); in ddr3_tip_special_rx() 698 temp += 0xa; in ddr3_tip_special_rx() [all …]
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| /drivers/net/ |
| A D | xilinx_axi_emac.c | 389 u16 temp; in setup_phy() local 404 if (temp & BMCR_ISOLATE) { in setup_phy() 405 temp &= ~BMCR_ISOLATE; in setup_phy() 463 u32 temp; in axiemac_stop() local 467 temp &= ~XAXIDMA_CR_RUNSTOP_MASK; in axiemac_stop() 584 u32 temp; in axiemac_start() local 606 temp &= ~XAXIDMA_IRQ_ALL_MASK; in axiemac_start() 630 temp |= XAXIDMA_CR_RUNSTOP_MASK; in axiemac_start() 697 u32 temp; in axiemac_send() local 749 u32 temp; in axiemac_recv() local [all …]
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| /drivers/i2c/ |
| A D | mxc_i2c.c | 249 temp &= ~(I2CR_MSTA | I2CR_MTX); in i2c_imx_stop() 263 unsigned int temp; in i2c_init_transfer_() local 293 temp |= I2CR_MSTA; in i2c_init_transfer_() 300 temp |= I2CR_MTX | I2CR_TX_NO_AK; in i2c_init_transfer_() 546 unsigned int temp; in i2c_read_data() local 556 temp &= ~(I2CR_MTX | I2CR_TX_NO_AK); in i2c_read_data() 558 temp |= I2CR_TX_NO_AK; in i2c_read_data() 584 temp |= I2CR_MTX | I2CR_TX_NO_AK; in i2c_read_data() 594 temp |= I2CR_TX_NO_AK; in i2c_read_data() 649 u32 temp; in bus_i2c_read() local [all …]
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| /drivers/ddr/microchip/ |
| A D | ddr2.c | 113 u32 ras2ras, ras2cas, prech2ras, temp; in ddr2_ctrl_init() local 226 temp = ((DIV_ROUND_UP(T_WR, T_CK) - 1) << 1) | 1; in ddr2_ctrl_init() 227 host_load_cmd(ctrl, 5, temp, LOAD_MODE_CMD | (RL << 28) | (2 << 24), in ddr2_ctrl_init() 240 host_load_cmd(ctrl, 9, temp, LOAD_MODE_CMD | (RL << 28) | (3 << 24), in ddr2_ctrl_init() 270 u32 temp; in ddr2_calculate_size() local 272 temp = 1 << (COL_BITS + BA_BITS + ROW_BITS); in ddr2_calculate_size() 274 temp = temp * CS_BITS * (16 / 8); in ddr2_calculate_size() 275 return (phys_size_t)temp; in ddr2_calculate_size()
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| /drivers/net/phy/ |
| A D | b53.c | 202 u64 temp = 0; in b53_mdio_read48() local 211 temp <<= 16; in b53_mdio_read48() 216 *val = temp; in b53_mdio_read48() 223 u64 temp = 0; in b53_mdio_read64() local 232 temp <<= 16; in b53_mdio_read64() 237 *val = temp; in b53_mdio_read64() 271 u32 temp = value; in b53_mdio_write32() local 279 temp >>= 16; in b53_mdio_write32() 289 u64 temp = value; in b53_mdio_write48() local 297 temp >>= 16; in b53_mdio_write48() [all …]
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| A D | xilinx_phy.c | 113 int temp; in xilinxphy_config() local 117 temp = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in xilinxphy_config() 118 temp &= XPCSPMA_PHY_CTRL_ISOLATE_DISABLE; in xilinxphy_config() 119 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, temp); in xilinxphy_config()
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| /drivers/phy/allwinner/ |
| A D | phy-sun4i-usb.c | 122 temp = readl(phyctl); in sun4i_usb_phy_write() 125 temp &= ~(0xff << 8); in sun4i_usb_phy_write() 129 writel(temp, phyctl); in sun4i_usb_phy_write() 132 temp = readb(phyctl); in sun4i_usb_phy_write() 134 temp |= PHYCTL_DATA; in sun4i_usb_phy_write() 137 temp &= ~usbc_bit; in sun4i_usb_phy_write() 138 writeb(temp, phyctl); in sun4i_usb_phy_write() 141 temp = readb(phyctl); in sun4i_usb_phy_write() 142 temp |= usbc_bit; in sun4i_usb_phy_write() 143 writeb(temp, phyctl); in sun4i_usb_phy_write() [all …]
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| /drivers/video/exynos/ |
| A D | exynos_dp.c | 173 unsigned char temp; in exynos_dp_handle_edid() local 200 temp = buf[DPCD_DPCD_REV]; in exynos_dp_handle_edid() 201 if (temp == DP_DPCD_REV_10 || temp == DP_DPCD_REV_11) in exynos_dp_handle_edid() 202 priv->dpcd_rev = temp; in exynos_dp_handle_edid() 208 temp = buf[DPCD_MAX_LINK_RATE]; in exynos_dp_handle_edid() 209 if (temp == DP_LANE_BW_1_62 || temp == DP_LANE_BW_2_70) in exynos_dp_handle_edid() 210 priv->lane_bw = temp; in exynos_dp_handle_edid() 224 temp = buf[DPCD_MAX_LANE_COUNT]; in exynos_dp_handle_edid() 228 if (temp == DP_LANE_CNT_1 || temp == DP_LANE_CNT_2 || in exynos_dp_handle_edid() 229 temp == DP_LANE_CNT_4) { in exynos_dp_handle_edid() [all …]
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| /drivers/spi/ |
| A D | exynos_spi.c | 138 int temp; in spi_rx_tx() local 149 temp = -1; in spi_rx_tx() 151 temp = *(uint32_t *)txp; in spi_rx_tx() 153 temp = *txp; in spi_rx_tx() 154 writel(temp, ®s->tx_data); in spi_rx_tx() 162 temp = readl(®s->rx_data); in spi_rx_tx() 164 if (temp == SPI_PREAMBLE_END_BYTE) { in spi_rx_tx() 171 *(uint32_t *)rxp = temp; in spi_rx_tx() 173 *rxp = temp; in spi_rx_tx()
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| /drivers/ddr/marvell/a38x/old/ |
| A D | ddr3_training_db.c | 520 u16 temp; in pattern_table_get_static_pbs_word() local 522 temp = ((0x00ff << (index / 3)) & 0xff00) >> 8; in pattern_table_get_static_pbs_word() 524 return temp | (temp << 8) | (temp << 16) | (temp << 24); in pattern_table_get_static_pbs_word()
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| A D | ddr3_training_centralization.c | 509 u32 temp = 0; in ddr3_tip_special_rx() local 630 &temp)); in ddr3_tip_special_rx() 631 temp = (temp + 0xa > 31) ? in ddr3_tip_special_rx() 632 (31) : (temp + 0xa); in ddr3_tip_special_rx() 640 temp)); in ddr3_tip_special_rx() 653 &temp)); in ddr3_tip_special_rx() 654 temp += 0xa; in ddr3_tip_special_rx() 659 PBS_RX_PHY_REG + 4, temp)); in ddr3_tip_special_rx() 664 &temp)); in ddr3_tip_special_rx() 665 temp += 0xa; in ddr3_tip_special_rx() [all …]
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| /drivers/thermal/ |
| A D | imx_scu_thermal.c | 28 static int read_temperature(struct udevice *dev, int *temp) in read_temperature() argument 38 if (!temp) in read_temperature() 48 *temp = celsius * 1000 + tenths * 100; in read_temperature() 53 int imx_sc_thermal_get_temp(struct udevice *dev, int *temp) in imx_sc_thermal_get_temp() argument 75 *temp = cpu_temp / 1000; in imx_sc_thermal_get_temp()
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| A D | thermal-uclass.c | 16 int thermal_get_temp(struct udevice *dev, int *temp) in thermal_get_temp() argument 23 return ops->get_temp(dev, temp); in thermal_get_temp()
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| A D | thermal_sandbox.c | 12 int sandbox_thermal_get_temp(struct udevice *dev, int *temp) in sandbox_thermal_get_temp() argument 15 *temp = 100; in sandbox_thermal_get_temp()
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| A D | ti-lm74.c | 13 static int ti_lm74_get_temp(struct udevice *dev, int *temp) in ti_lm74_get_temp() argument 31 *temp = (((int)raw * 125) + 1000) / 2000; in ti_lm74_get_temp()
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| A D | ti-bandgap.c | 161 static int ti_bandgap_get_temp(struct udevice *dev, int *temp) in ti_bandgap_get_temp() argument 166 *temp = dra752_adc_to_temp[bgp->adc_val - DRA752_ADC_START_VALUE]; in ti_bandgap_get_temp()
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| /drivers/gpio/ |
| A D | gpio-aspeed-sgpio.c | 181 u32 temp; in aspeed_g4_reg_bit_set() local 185 temp = readl(bank_reg(gpio, bank, reg_rdata)); in aspeed_g4_reg_bit_set() 187 temp = readl(addr); in aspeed_g4_reg_bit_set() 190 temp |= GPIO_BIT(offset); in aspeed_g4_reg_bit_set() 192 temp &= ~GPIO_BIT(offset); in aspeed_g4_reg_bit_set() 194 writel(temp, addr); in aspeed_g4_reg_bit_set()
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| /drivers/serial/ |
| A D | serial_pl01x.c | 151 unsigned int temp; in pl01x_generic_setbrg() local 165 temp = 16 * baudrate; in pl01x_generic_setbrg() 166 divider = clock / temp; in pl01x_generic_setbrg() 167 remainder = clock % temp; in pl01x_generic_setbrg() 168 temp = (8 * remainder) / baudrate; in pl01x_generic_setbrg() 169 fraction = (temp >> 1) + (temp & 1); in pl01x_generic_setbrg()
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| /drivers/ddr/altera/ |
| A D | sdram_gen5.c | 503 unsigned long temp; in sdram_calculate_size() local 513 temp = readl(&sdr_ctrl->dram_addrw); in sdram_calculate_size() 514 col = (temp & SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK) >> in sdram_calculate_size() 537 bank = (temp & SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK) >> in sdram_calculate_size() 557 temp = 1 << (row + bank + col); in sdram_calculate_size() 558 temp = temp * cs * (width / 8); in sdram_calculate_size() 560 debug("%s returns %ld\n", __func__, temp); in sdram_calculate_size() 562 return temp; in sdram_calculate_size()
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| /drivers/clk/microchip/ |
| A D | mpfs_clk_msspll.c | 63 unsigned long temp; in mpfs_clk_msspll_recalc_rate() local 72 temp = msspll_hw->prate / (ref_div * MSSPLL_FIXED_DIV * postdiv); in mpfs_clk_msspll_recalc_rate() 73 return temp * mult; in mpfs_clk_msspll_recalc_rate()
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