Searched refs:uart_clk (Results 1 – 1 of 1) sorted by relevance
41 u32 uart_clk; /* frequency of uart clock source */ member89 divisor = DIV_ROUND_CLOSEST(plat->uart_clk, 16 * baudrate) - 2; in npcm_serial_setbrg()129 plat->uart_clk = clk_get_rate(&clk); in npcm_serial_probe()
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