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Searched refs:value (Results 1 – 25 of 463) sorted by relevance

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/drivers/video/tegra/
A Dmipi.c94 u32 value; in tegra114_mipi_pads_cal() local
104 value &= ~(MIPI_CAL_SEL(0x1)); in tegra114_mipi_pads_cal()
109 value &= ~(MIPI_CAL_SEL(0x1)); in tegra114_mipi_pads_cal()
116 u32 value; in tegra124_mipi_pads_cal() local
128 value = MIPI_CAL_SEL(0x1) | in tegra124_mipi_pads_cal()
136 value &= ~(MIPI_CAL_SEL(0x1)); in tegra124_mipi_pads_cal()
141 value &= ~(MIPI_CAL_SEL(0x1)); in tegra124_mipi_pads_cal()
155 value = MIPI_CAL_SEL(0x1) | in tegra124_mipi_pads_cal()
177 u32 value; in tegra_mipi_calibrate() local
214 value |= MIPI_CAL_CTRL_START; in tegra_mipi_calibrate()
[all …]
A Ddsi.c69 u32 value; in tegra_dc_enable_controller() local
106 u32 value; in tegra_dsi_read_response() local
134 size = ((value >> 8) & 0xff00) | ((value >> 8) & 0xff); in tegra_dsi_read_response()
138 size = ((value >> 8) & 0xff00) | ((value >> 8) & 0xff); in tegra_dsi_read_response()
203 u32 value; in tegra_dsi_writesl() local
206 value = 0; in tegra_dsi_writesl()
225 u32 value; in tegra_dsi_host_transfer() local
491 u32 value; in tegra_dsi_pad_calibrate() local
530 u32 value; in tegra_dsi_mipi_calibrate() local
572 u32 value; in tegra_dsi_set_timeout() local
[all …]
A Dhdmi.c171 u32 value; in tegra_dc_enable_controller() local
174 value |= HDMI_ENABLE; in tegra_dc_enable_controller()
185 u32 value; in tegra_hdmi_setup_tmds() local
194 value |= BIT(31); in tegra_hdmi_setup_tmds()
208 u32 value; in tegra_hdmi_encoder_enable() local
213 value &= ~SOR_PLL_PDBG; in tegra_hdmi_encoder_enable()
219 value &= ~SOR_PLL_PWR; in tegra_hdmi_encoder_enable()
243 value = HDMI_SRC_DISPLAYB; in tegra_hdmi_encoder_enable()
245 value = HDMI_SRC_DISPLAYA; in tegra_hdmi_encoder_enable()
287 value |= SOR_CSTM_ROTCLK(2); in tegra_hdmi_encoder_enable()
[all …]
A Dcpu-bridge.c47 u8 type, u8 value) in tegra_cpu_bridge_write() argument
58 (value >> i) & 0x1); in tegra_cpu_bridge_write()
66 __func__, type, value); in tegra_cpu_bridge_write()
119 u32 value; in tegra_cpu_bridge_attach() local
140 writel(value, &disp->seq_ctrl); in tegra_cpu_bridge_attach()
148 value = readl(&cmd->disp_cmd); in tegra_cpu_bridge_attach()
149 value &= ~CTRL_MODE_MASK; in tegra_cpu_bridge_attach()
151 writel(value, &cmd->disp_cmd); in tegra_cpu_bridge_attach()
164 writel(value, &disp->shift_clk_opt); in tegra_cpu_bridge_attach()
166 value = readl(&disp->disp_color_ctrl); in tegra_cpu_bridge_attach()
[all …]
/drivers/phy/
A Dphy-imx8mq-usb.c96 u32 value; in imx8mq_usb_phy_init() local
105 value |= PHY_CTRL0_REF_SSP_EN; in imx8mq_usb_phy_init()
106 value &= ~PHY_CTRL0_SSC_RANGE_MASK; in imx8mq_usb_phy_init()
107 value |= PHY_CTRL0_SSC_RANGE_4003PPM; in imx8mq_usb_phy_init()
111 value |= PHY_CTRL2_TXENABLEN0; in imx8mq_usb_phy_init()
125 u32 value; in imx8mp_usb_phy_init() local
129 value &= ~PHY_CTRL0_FSEL_MASK; in imx8mp_usb_phy_init()
144 value |= PHY_CTRL0_REF_SSP_EN; in imx8mp_usb_phy_init()
175 u32 value; in imx8mq_usb_phy_power_on() local
211 u32 value; in imx8mq_usb_phy_power_off() local
[all …]
/drivers/spi/
A Dgxp_spi.c40 unsigned char value; in spi_set_mode() local
47 value &= ~(0x03 << 4); in spi_set_mode()
49 value |= (0x03 << 4); in spi_set_mode()
62 unsigned int value; in gxp_spi_xfer() local
88 value &= ~(1 << 24); in gxp_spi_xfer()
98 value |= (3 << 16); in gxp_spi_xfer()
107 value &= ~(0x1f << 19); in gxp_spi_xfer()
110 value |= (8 << 19); in gxp_spi_xfer()
119 value |= (1 << 3); in gxp_spi_xfer()
155 value |= (1 << 3); in gxp_spi_xfer()
[all …]
/drivers/video/
A Datmel_lcdfb.c54 unsigned long value; in atmel_fb_init() local
79 value++; in atmel_fb_init()
80 value = (value / 2) - 1; in atmel_fb_init()
82 if (!value) { in atmel_fb_init()
91 value |= ATMEL_LCDC_DISTYPE_TFT; in atmel_fb_init()
97 value |= bpix << 5; in atmel_fb_init()
103 value |= timing->vfront_porch.typ; in atmel_fb_init()
105 value |= 1U << 31; in atmel_fb_init()
116 value |= timing->vactive.typ - 1; in atmel_fb_init()
130 value = ATMEL_LCDC_PS_DIV8 | in atmel_fb_init()
[all …]
A Datmel_hlcdfb.c74 unsigned long value, vl_clk_pol; in atmel_hlcdc_init() local
105 value++; in atmel_hlcdc_init()
111 if (value < 1) { in atmel_hlcdc_init()
133 value = 0; in atmel_hlcdc_init()
136 value |= LCDC_LCDCFG5_HSPOL; in atmel_hlcdc_init()
138 value |= LCDC_LCDCFG5_VSPOL; in atmel_hlcdc_init()
160 writel(value, &regs->lcdc_lcdcfg5); in atmel_hlcdc_init()
229 value = readl(&regs->lcdc_lcden); in atmel_hlcdc_init()
235 value = readl(&regs->lcdc_lcden); in atmel_hlcdc_init()
241 value = readl(&regs->lcdc_lcden); in atmel_hlcdc_init()
[all …]
/drivers/pci/
A Dpcie_plda_common.h67 uint offset, ulong value,
75 u32 value; in plda_pcie_enable_root_port() local
78 value |= PLDA_RP_ENABLE; in plda_pcie_enable_root_port()
84 u32 value; in plda_pcie_set_standard_class() local
87 value &= 0xff; in plda_pcie_set_standard_class()
94 u32 value; in plda_pcie_set_pref_win_64bit() local
97 value |= PREF_MEM_WIN_64_SUPPORT; in plda_pcie_set_pref_win_64bit()
103 u32 value; in plda_pcie_disable_ltr() local
106 value &= ~PMSG_LTR_SUPPORT; in plda_pcie_disable_ltr()
112 u32 value; in plda_pcie_disable_func() local
[all …]
A Dpci_tegra.c318 value = 0xffffffff; in pci_tegra_read_config()
354 value = pci_conv_size_to_32(old, value, offset, size); in pci_tegra_write_config()
606 unsigned long value; in tegra_pcie_power_on() local
636 value |= (1 << 0); in tegra_pcie_power_on()
637 value &= ~(1 << 1); in tegra_pcie_power_on()
654 u32 value; in tegra_pcie_pll_wait() local
668 u32 value; in tegra_pcie_phy_enable() local
725 u32 value; local
892 unsigned long value; local
921 unsigned long value; local
[all …]
/drivers/usb/gadget/
A Df_dfu.c269 int value = 0; in state_app_idle() local
288 return value; in state_app_idle()
311 return value; in state_app_detach()
343 if (value >= 0 && value < len) in state_dfu_idle()
379 return value; in state_dfu_idle()
402 return value; in state_dfu_dnload_sync()
422 return value; in state_dfu_dnbusy()
460 return value; in state_dfu_dnload_idle()
487 return value; in state_dfu_manifest_sync()
513 return value; in state_dfu_manifest()
[all …]
/drivers/gpio/
A Ds5p_gpio.c76 unsigned int value; in s5p_gpio_cfg_pin() local
86 unsigned int value; in s5p_gpio_set_value() local
91 value |= DAT_SET(gpio); in s5p_gpio_set_value()
107 unsigned int value; in s5p_gpio_get_cfg_pin() local
110 value &= CON_MASK(gpio); in s5p_gpio_get_cfg_pin()
116 unsigned int value; in s5p_gpio_get_value() local
125 unsigned int value; in s5p_gpio_set_pull() local
144 unsigned int value; in s5p_gpio_set_drv() local
165 unsigned int value; in s5p_gpio_set_rate() local
202 int value) in exynos_gpio_direction_output() argument
[all …]
A Dmsm_gpio.c71 unsigned int gpio, int value) in msm_gpio_set_value_special() argument
84 value = !!value; in msm_gpio_set_value_special()
86 writel(value << data->out_bit, priv->base + data->io_reg); in msm_gpio_set_value_special()
96 return msm_gpio_set_value_special(priv, gpio, value); in msm_gpio_set_value()
98 value = !!value; in msm_gpio_set_value()
107 int value) in msm_gpio_direction_output_special() argument
120 value = !!value; in msm_gpio_direction_output_special()
122 writel(value << data->out_bit, priv->base + data->io_reg); in msm_gpio_direction_output_special()
135 int value) in msm_gpio_direction_output() argument
140 return msm_gpio_direction_output_special(priv, gpio, value); in msm_gpio_direction_output()
[all …]
/drivers/tpm/
A Dtpm_tis_lpc.c116 writeb(value, ptr); in tpm_write_byte()
148 return value; in tis_wait_reg()
206 u32 value; in tis_senddata() local
213 return value; in tis_senddata()
251 if ((value == -ETIMEDOUT) || !(value & TIS_STS_EXPECT)) { in tis_senddata()
254 return value == -ETIMEDOUT ? value : -EIO; in tis_senddata()
276 if ((value == -ETIMEDOUT) || (value & TIS_STS_EXPECT)) { in tis_senddata()
279 return value == -ETIMEDOUT ? value : -EIO; in tis_senddata()
304 u32 value; in tis_readresponse() local
317 return value; in tis_readresponse()
[all …]
/drivers/power/pmic/
A Das3722_gpio.c17 u8 value = 0; in as3722_gpio_configure() local
21 value |= AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH; in as3722_gpio_configure()
24 value |= AS3722_GPIO_CONTROL_INVERT; in as3722_gpio_configure()
40 u8 value; in as3722_gpio_set_value() local
51 value = err; in as3722_gpio_set_value()
54 value &= ~(1 << gpio); in as3722_gpio_set_value()
57 value |= 1 << gpio; in as3722_gpio_set_value()
71 int value) in as3722_gpio_direction_output() argument
79 if (value == 0) in as3722_gpio_direction_output()
80 value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL; in as3722_gpio_direction_output()
[all …]
/drivers/misc/
A Dk3_esm.c32 u32 value; in esm_pin_enable() local
34 value = readl(base + ESM_PIN_EN_SET_OFFSET(pin)); in esm_pin_enable()
35 value |= ESM_PIN_MASK(pin); in esm_pin_enable()
42 u32 value; in esm_intr_enable() local
45 value |= ESM_INTR_MASK(pin); in esm_intr_enable()
52 u32 value; in esm_intr_prio_set() local
55 value |= ESM_INTR_PRIO_MASK(pin); in esm_intr_prio_set()
62 u32 value; in esm_clear_raw_status() local
64 value = readl(base + ESM_STS(pin)); in esm_clear_raw_status()
65 value |= ESM_STS_MASK(pin); in esm_clear_raw_status()
[all …]
/drivers/crypto/tegra/
A Dtegra_aes.c125 if (value) { in tegra_aes_check_error()
127 log_debug("%s 0x%x\n", __func__, value); in tegra_aes_check_error()
130 return value; in tegra_aes_check_error()
158 u32 value; in tegra_aes_configure() local
185 value &= ~TEGRA_AES_BSE_MODE_FIELD; in tegra_aes_configure()
216 u32 value; in tegra_aes_call_engine() local
345 u32 value, addr; in tegra_aes_ops_set_key_for_key_slot() local
443 u32 value; in tegra_aes_hw_init() local
510 u32 value; in tegra_aes_probe() local
534 value = (uint32_t)priv->iram_addr; in tegra_aes_probe()
[all …]
/drivers/usb/mtu3/
A Dmtu3_host.c36 u32 value; in ssusb_host_enable() local
50 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i)); in ssusb_host_enable()
52 value |= SSUSB_U3_PORT_HOST_SEL; in ssusb_host_enable()
53 mtu3_writel(ibase, SSUSB_U3_CTRL(i), value); in ssusb_host_enable()
58 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i)); in ssusb_host_enable()
60 value |= SSUSB_U2_PORT_HOST_SEL; in ssusb_host_enable()
61 mtu3_writel(ibase, SSUSB_U2_CTRL(i), value); in ssusb_host_enable()
76 u32 value; in ssusb_host_disable() local
84 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i)); in ssusb_host_disable()
86 mtu3_writel(ibase, SSUSB_U3_CTRL(i), value); in ssusb_host_disable()
[all …]
/drivers/power/regulator/
A Dcpcap_regulator.c135 if (value < 0) in cpcap_regulator_get_value()
136 return value; in cpcap_regulator_get_value()
141 value &= regulator->volt_mask; in cpcap_regulator_get_value()
155 value = 0; in cpcap_regulator_set_value()
157 value = regulator->volt_mask; in cpcap_regulator_set_value()
159 for (value = 0; value < regulator->val_tbl_sz; value++) in cpcap_regulator_set_value()
166 value <<= volt_shift; in cpcap_regulator_set_value()
171 value); in cpcap_regulator_set_value()
185 int value; in cpcap_regulator_get_enable() local
188 if (value < 0) in cpcap_regulator_get_enable()
[all …]
/drivers/ram/stm32mp1/
A Dstm32mp1_interactive.c149 unsigned long value; in stm32mp1_do_info() local
189 config->info.size = value; in stm32mp1_do_info()
270 unsigned long value; in stm32mp1_do_step() local
280 &value) < 0) || in stm32mp1_do_step()
288 value <= step) { in stm32mp1_do_step()
290 (int)value, step_str[value], in stm32mp1_do_step()
295 (int)value, step_str[value]); in stm32mp1_do_step()
296 return (int)value; in stm32mp1_do_step()
316 unsigned long value; in stm32mp1_ddr_subcmd() local
336 value >= array_nb) { in stm32mp1_ddr_subcmd()
[all …]
/drivers/spmi/
A Dspmi-sandbox.c28 u8 value; member
70 regs[0x8].value &= ~0x1; in sandbox_spmi_write()
71 regs[0x8].value |= val & 0x1; in sandbox_spmi_write()
91 if (regs[0x46].value == 0) /* Block disabled */ in sandbox_spmi_read()
98 return regs[off].value; in sandbox_spmi_read()
101 return regs[off].value; in sandbox_spmi_read()
120 regs[4].value = 0x10; in sandbox_spmi_probe()
122 regs[5].value = 0x5; in sandbox_spmi_probe()
131 regs[0x42].value = 0x4; in sandbox_spmi_probe()
134 regs[0x45].value = 0x1; in sandbox_spmi_probe()
[all …]
/drivers/pwm/
A Dpwm-tiecap.c52 u16 value; in tiecap_pwm_set_config() local
69 value = readw(priv->regs + ECAP_PWM_ECCTL2); in tiecap_pwm_set_config()
74 writew(value, priv->regs + ECAP_PWM_ECCTL2); in tiecap_pwm_set_config()
95 u16 value; in tiecap_pwm_set_enable() local
97 value = readw(priv->regs + ECAP_PWM_ECCTL2); in tiecap_pwm_set_enable()
114 writew(value, priv->regs + ECAP_PWM_ECCTL2); in tiecap_pwm_set_enable()
123 u16 value; in tiecap_pwm_set_invert() local
125 value = readw(priv->regs + ECAP_PWM_ECCTL2); in tiecap_pwm_set_invert()
129 value |= ECAP_PWM_ECCTL2_APWM_POL_LOW; in tiecap_pwm_set_invert()
132 value &= ~ECAP_PWM_ECCTL2_APWM_POL_LOW; in tiecap_pwm_set_invert()
[all …]
/drivers/pci_endpoint/
A Dpcie-cadence.h238 writeb(value, pcie->reg_base + reg); in cdns_pcie_writeb()
243 writew(value, pcie->reg_base + reg); in cdns_pcie_writew()
248 writel(value, pcie->reg_base + reg); in cdns_pcie_writel()
258 u32 reg, u8 value) in cdns_pcie_rp_writeb() argument
260 writeb(value, pcie->reg_base + CDNS_PCIE_RP_BASE + reg); in cdns_pcie_rp_writeb()
264 u32 reg, u16 value) in cdns_pcie_rp_writew() argument
266 writew(value, pcie->reg_base + CDNS_PCIE_RP_BASE + reg); in cdns_pcie_rp_writew()
270 u32 reg, u32 value) in cdns_pcie_rp_writel() argument
277 u32 reg, u8 value) in cdns_pcie_ep_fn_writeb() argument
283 u32 reg, u16 value) in cdns_pcie_ep_fn_writew() argument
[all …]
/drivers/rtc/
A Drtc-uclass.c117 u16 value = 0; in rtc_read16() local
121 for (i = 0; i < sizeof(value); i++) { in rtc_read16()
125 value |= ret << (i << 3); in rtc_read16()
128 *valuep = value; in rtc_read16()
136 for (i = 0; i < sizeof(value); i++) { in rtc_write16()
137 ret = rtc_write8(dev, reg + i, (value >> (i << 3)) & 0xff); in rtc_write16()
147 u32 value = 0; in rtc_read32() local
151 for (i = 0; i < sizeof(value); i++) { in rtc_read32()
155 value |= ret << (i << 3); in rtc_read32()
158 *valuep = value; in rtc_read32()
[all …]
/drivers/net/phy/
A Db53.c247 REG_MII_DATA0, value); in b53_mdio_write8()
255 u16 value) in b53_mdio_write16() argument
268 u32 value) in b53_mdio_write32() argument
271 u32 temp = value; in b53_mdio_write32()
286 u64 value) in b53_mdio_write48() argument
289 u64 temp = value; in b53_mdio_write48()
304 u64 value) in b53_mdio_write64() argument
307 u64 temp = value; in b53_mdio_write64()
322 u8 reg, u8 *value) in b53_read8() argument
352 u8 reg, u8 value) in b53_write8() argument
[all …]

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