| /drivers/pci/ |
| A D | pci_gt64120.c | 47 int where, u32 *data) in gt_config_access() argument
63 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); in gt_config_access()
68 addr = PCI_CONF1_ADDRESS(bus, dev, func, where); in gt_config_access()
109 PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), where, *data); in gt_config_access()
115 uint where, ulong *val, in gt64120_pci_read_config() argument
121 if (gt_config_access(gt, PCI_ACCESS_READ, bdf, where, &data)) { in gt64120_pci_read_config()
126 *val = pci_conv_32_to_size(data, where, size); in gt64120_pci_read_config()
132 uint where, ulong val, in gt64120_pci_write_config() argument
143 if (gt_config_access(gt, PCI_ACCESS_READ, bdf, where, &old)) in gt64120_pci_write_config()
146 data = pci_conv_size_to_32(old, val, where, size); in gt64120_pci_write_config()
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| A D | pci_msc01.c | 30 int where, u32 *data) in msc01_config_access() argument
43 __raw_writel((PCI_CONF1_ADDRESS(bus, dev, func, where) & ~PCI_CONF1_ENABLE), in msc01_config_access()
63 uint where, ulong *val, enum pci_size_t size) in msc01_pci_read_config() argument
68 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &data)) { in msc01_pci_read_config()
73 *val = pci_conv_32_to_size(data, where, size); in msc01_pci_read_config()
79 uint where, ulong val, enum pci_size_t size) in msc01_pci_write_config() argument
89 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &old)) in msc01_pci_write_config()
92 data = pci_conv_size_to_32(old, val, where, size); in msc01_pci_write_config()
95 msc01_config_access(msc01, PCI_ACCESS_WRITE, bdf, where, &data); in msc01_pci_write_config()
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| A D | pci-rcar-gen3.c | 133 int shift = 8 * (where & 3); in rcar_rmw32()
135 clrsetbits_le32(priv->regs + (where & ~3), in rcar_rmw32()
142 int shift = 8 * (where & 3); in rcar_read_conf()
149 pci_dev_t bdf, int where, ulong *data) in rcar_pcie_config_access() argument
152 u32 reg = where & ~3; in rcar_pcie_config_access()
214 uint where, ulong *val, in rcar_gen3_pcie_read_config() argument
220 ret = rcar_gen3_pcie_addr_valid(bdf, where); in rcar_gen3_pcie_read_config()
227 bdf, where, ®); in rcar_gen3_pcie_read_config()
237 uint where, ulong val, in rcar_gen3_pcie_write_config() argument
243 ret = rcar_gen3_pcie_addr_valid(bdf, where); in rcar_gen3_pcie_write_config()
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| A D | pcie_iproc.c | 438 uint where, void **paddress) in iproc_pcie_map_ep_cfg_reg() argument
454 where & CFG_IND_ADDR_MASK); in iproc_pcie_map_ep_cfg_reg()
467 val = (PCIE_ECAM_OFFSET(busno, slot, fn, where) & CFG_ADDR_CFG_ECAM_MASK) in iproc_pcie_map_ep_cfg_reg()
485 switch (where & ~0x3) { in iproc_pcie_fix_cap()
525 unsigned int devfn, int where, in iproc_pci_raw_config_read32() argument
531 ret = iproc_pcie_map_ep_cfg_reg(pcie->dev, devfn, where & ~0x3, &addr); in iproc_pci_raw_config_read32()
540 *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1); in iproc_pci_raw_config_read32()
546 unsigned int devfn, int where, in iproc_pci_raw_config_write32() argument
553 ret = iproc_pcie_map_ep_cfg_reg(pcie->dev, devfn, where & ~0x3, &addr); in iproc_pci_raw_config_write32()
562 mask = ~(((1 << (size * 8)) - 1) << ((where & 0x3) * 8)); in iproc_pci_raw_config_write32()
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| A D | pcie_mediatek.c | 100 #define CFG_HEADER_DW1(where, size) \ argument
101 (GENMASK(((size) - 1), 0) << ((where) & 0x3))
194 int where, int size, ulong *val) in mtk_pcie_hw_rd_cfg() argument
200 writel(CFG_HEADER_DW1(where, size), port->base + PCIE_CFG_HEADER1); in mtk_pcie_hw_rd_cfg()
201 writel(CFG_HEADER_DW2(where, PCI_FUNC(devfn), PCI_DEV(devfn), bus), in mtk_pcie_hw_rd_cfg()
217 *val = (*val >> (8 * (where & 3))) & 0xff; in mtk_pcie_hw_rd_cfg()
219 *val = (*val >> (8 * (where & 3))) & 0xffff; in mtk_pcie_hw_rd_cfg()
225 int where, int size, u32 val) in mtk_pcie_hw_wr_cfg() argument
230 writel(CFG_HEADER_DW1(where, size), port->base + PCIE_CFG_HEADER1); in mtk_pcie_hw_wr_cfg()
231 writel(CFG_HEADER_DW2(where, PCI_FUNC(devfn), PCI_DEV(devfn), bus), in mtk_pcie_hw_wr_cfg()
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| A D | pcie_rockchip.c | 102 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); in rockchip_pcie_rd_conf() local
106 value = readl(priv->apb_base + PCIE_RC_NORMAL_BASE + where); in rockchip_pcie_rd_conf()
112 value = readl(priv->axi_base + where); in rockchip_pcie_rd_conf()
129 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset & ~0x3); in rockchip_pcie_wr_conf() local
133 old = readl(priv->apb_base + PCIE_RC_NORMAL_BASE + where); in rockchip_pcie_wr_conf()
135 writel(value, priv->apb_base + PCIE_RC_NORMAL_BASE + where); in rockchip_pcie_wr_conf()
140 old = readl(priv->axi_base + where); in rockchip_pcie_wr_conf()
142 writel(value, priv->axi_base + where); in rockchip_pcie_wr_conf()
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| A D | pcie_imx.c | 338 pci_dev_t d, int where) in get_bus_address() argument
357 va_address += (where & ~0x3); in get_bus_address()
403 int where, u32 *val) in imx_pcie_read_cfg() argument
414 va_address = get_bus_address(priv, d, where); in imx_pcie_read_cfg()
432 int where, u32 val) in imx_pcie_write_cfg() argument
441 va_address = get_bus_address(priv, d, where); in imx_pcie_write_cfg()
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| A D | pcie_plda_common.c | 38 int where = PCIE_ECAM_OFFSET(PCI_BUS(bdf) - dev_seq(udev), in plda_pcie_conf_address() local
44 *paddr = (void *)(priv->cfg_base + where); in plda_pcie_conf_address()
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| A D | pcie_dw_mvebu.c | 179 pci_dev_t d, uint where) in set_cfg_address() argument
208 va_address += where & ~0x3; in set_cfg_address()
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| A D | pcie_mediatek_gen3.c | 110 int where, int size) in mtk_pcie_config_tlp_header() argument
119 bytes = (GENMASK(size - 1, 0) & 0xf) << (where & 0x3); in mtk_pcie_config_tlp_header()
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| A D | pcie_dw_common.c | 163 pci_dev_t d, uint where) in set_cfg_address() argument
203 va_address += where & ~0x3; in set_cfg_address()
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| A D | pci_tegra.c | 279 int where, unsigned long *address) in tegra_pcie_conf_address() argument
289 *address = port->regs.start + (where & ~3); in tegra_pcie_conf_address()
303 PCI_FUNC(bdf), where) & ~PCI_CONF1_ENABLE); in tegra_pcie_conf_address()
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| A D | Kconfig | 61 where every peripheral is on the PCI bus.
76 This should only be required on MIPS where CFG_SYS_SDRAM_BASE is still
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| /drivers/video/bridge/ |
| A D | Kconfig | 6 another. For example, where the SoC only supports eDP and the LCD
27 LVDS capability, or where LVDS requires too many signals to route
37 or where LVDS requires too many signals to route on the PCB.
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| /drivers/i2c/muxes/ |
| A D | Kconfig | 25 response mechanism where masters have to claim the bus by asserting
42 I2C controller where driver handles proper routing to target i2c
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| /drivers/sysreset/ |
| A D | Kconfig | 100 example on Microblaze where reset logic can be controlled via GPIO
108 for example on Microblaze where reset logic can be controlled via
116 for example on Microblaze where reset logic can be controlled via
124 for example on Microblaze where reset logic can be controlled via
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| /drivers/ata/ |
| A D | Kconfig | 20 Attachment, where AT refers to an IBM AT (Advanced Technology)
158 for example, which shows where the conversion needs to be completed.
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| /drivers/iommu/ |
| A D | Kconfig | 32 Qualcomm boards have a non-standard SMMU where some registers are
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| /drivers/virtio/ |
| A D | Kconfig | 7 # where just the guest's device driver "knows" it is running in a virtual
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| /drivers/rng/ |
| A D | Kconfig | 54 Generator on ARM SoCs where hardware entropy sources are not
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| /drivers/block/ |
| A D | Kconfig | 200 offset 0) has its own CONFIG, to deal with controllers where it is
246 where reset is 1 to assert reset and 0 to de-assert it. This function
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| /drivers/mtd/ubi/ |
| A D | Kconfig | 92 the device. Using fastmap makes only sense on large devices where
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| /drivers/core/ |
| A D | Kconfig | 83 model. This can help to figure out where all the memory is going and
93 model. This can help to figure out where all the memory is going and
194 addresses on systems where different buses have different views of
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| /drivers/mtd/nand/raw/ |
| A D | Kconfig | 341 where
744 Set the offset from the start of the nand where u-boot should be
752 Set the offset from the start of the nand where the redundant u-boot
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| /drivers/bootcount/ |
| A D | Kconfig | 24 Set to the address where the bootcount and bootcount magic
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