Searched refs:write_data (Results 1 – 6 of 6) sorted by relevance
| /drivers/mtd/nand/raw/ |
| A D | kmeter1_nand.c | 19 #define write_data(val) out_8(CFG_NAND_DATA_REG, val) macro
69 write_data(cmd); in kpn_nand_hwcontrol()
85 write_data(buf[i]); in kpn_nand_write_buf()
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| /drivers/misc/ |
| A D | sifive-otp.c | 178 u32 write_data; in sifive_otp_write() local
209 write_data = *(write_buf++); in sifive_otp_write()
216 writel(((write_data >> bit) & 1), in sifive_otp_write()
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| /drivers/ddr/marvell/a38x/ |
| A D | ddr3_training_leveling.c | 1289 u32 data, write_data; in ddr3_tip_wl_supp_align_phase_shift() local
1305 write_data = data & ~0x1df; in ddr3_tip_wl_supp_align_phase_shift()
1307 write_data = (data & ~0x1c0) | in ddr3_tip_wl_supp_align_phase_shift()
1311 WL_PHY_REG(effective_cs), write_data); in ddr3_tip_wl_supp_align_phase_shift()
1319 write_data = (data & ~0x1c0) | in ddr3_tip_wl_supp_align_phase_shift()
1323 WL_PHY_REG(effective_cs), write_data); in ddr3_tip_wl_supp_align_phase_shift()
1331 write_data = (data & ~0x1c0) | in ddr3_tip_wl_supp_align_phase_shift()
1335 WL_PHY_REG(effective_cs), write_data); in ddr3_tip_wl_supp_align_phase_shift()
1343 write_data = (data & ~0x1c0) | in ddr3_tip_wl_supp_align_phase_shift()
1347 WL_PHY_REG(effective_cs), write_data); in ddr3_tip_wl_supp_align_phase_shift()
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| /drivers/net/ |
| A D | mt7628-eth.c | 204 u32 phy_addr, u32 phy_register, u32 write_data) in mii_mgr_write() argument
215 data = FIELD_PREP(PCR0_WT_DATA, write_data) | in mii_mgr_write()
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| /drivers/video/ |
| A D | logicore_dp_tx.c | 613 void *write_data) in aux_write() argument
622 bytes_to_write, (u8 *)write_data); in aux_write()
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| /drivers/video/zynqmp/ |
| A D | zynqmp_dpsub.c | 688 void *write_data) in aux_write() argument
691 bytes_to_write, (u8 *)write_data); in aux_write()
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