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Searched refs:AUD_CLKID_MST_B_SCLK (Results 1 – 7 of 7) sorted by relevance

/dts/upstream/include/dt-bindings/clock/
A Daxg-audio-clkc.h61 #define AUD_CLKID_MST_B_SCLK 80 macro
/dts/upstream/src/arm64/amlogic/
A Dmeson-g12b-bananapi-cm4-mnt-reform2.dts359 assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_SCLK>,
A Dmeson-g12.dtsi29 clocks = <&clkc_audio AUD_CLKID_MST_B_SCLK>,
A Dmeson-g12a-u200.dts573 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
A Dmeson-sm1.dtsi31 clocks = <&clkc_audio AUD_CLKID_MST_B_SCLK>,
A Dmeson-g12b-odroid-go-ultra.dts685 assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_SCLK>,
A Dmeson-axg.dtsi39 clocks = <&clkc_audio AUD_CLKID_MST_B_SCLK>,

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