Home
last modified time | relevance | path

Searched refs:CLK_MOUT_MPLL_USER_T (Results 1 – 9 of 9) sorted by relevance

/dts/upstream/src/arm/samsung/
A Dexynos4412-odroid-common.dtsi213 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
221 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
229 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
237 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
A Dexynos4412-midas.dtsi459 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
479 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
511 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
519 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
527 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
535 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
A Dexynos4412-itop-elite.dts168 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
A Dexynos4x12.dtsi503 <&clock CLK_MOUT_MPLL_USER_T>,
/dts/upstream/Bindings/media/
A Dsamsung,fimc.yaml164 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
222 <&clock CLK_MOUT_MPLL_USER_T>,
A Dsamsung,exynos4210-csis.yaml143 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
A Dsamsung,exynos4210-fimc.yaml150 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
A Dsamsung,exynos4212-fimc-is.yaml172 <&clock CLK_MOUT_MPLL_USER_T>,
/dts/upstream/include/dt-bindings/clock/
A Dexynos4.h29 #define CLK_MOUT_MPLL_USER_T 17 /* Exynos4x12 only */ macro

Completed in 23 milliseconds