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Searched refs:GCC_PCIE0_PIPE_ARES (Results 1 – 10 of 10) sorted by relevance

/dts/upstream/include/dt-bindings/reset/
A Dqcom,gcc-ipq5018.h46 #define GCC_PCIE0_PIPE_ARES 37 macro
A Dqcom,gcc-ipq6018.h105 #define GCC_PCIE0_PIPE_ARES 96 macro
A Dqcom,ipq9574-gcc.h89 #define GCC_PCIE0_PIPE_ARES 80 macro
A Dqcom,ipq5424-gcc.h182 #define GCC_PCIE0_PIPE_ARES 173 macro
/dts/upstream/include/dt-bindings/clock/
A Dqcom,gcc-ipq8074.h355 #define GCC_PCIE0_PIPE_ARES 117 macro
/dts/upstream/src/arm64/qcom/
A Dipq5018.dtsi603 resets = <&gcc GCC_PCIE0_PIPE_ARES>,
A Dipq8074.dtsi946 resets = <&gcc GCC_PCIE0_PIPE_ARES>,
A Dipq5424.dtsi1085 resets = <&gcc GCC_PCIE0_PIPE_ARES>,
A Dipq6018.dtsi909 resets = <&gcc GCC_PCIE0_PIPE_ARES>,
A Dipq9574.dtsi1224 resets = <&gcc GCC_PCIE0_PIPE_ARES>,

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