Searched refs:PLL_GPLL (Results 1 – 25 of 43) sorted by relevance
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| /dts/upstream/src/arm64/rockchip/ |
| A D | rk3566-powkiddy-rk2023.dts | 16 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| A D | rk3566-powkiddy-rgb30.dts | 16 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| A D | rk3566-powkiddy-rgb10max3.dts | 20 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| A D | rk3566-powkiddy-rgb20sx.dts | 46 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| A D | rk3566-anbernic-rg353x.dtsi | 81 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| A D | rk3566-anbernic-rg-arc.dtsi | 79 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| A D | rk3566-anbernic-rg503.dts | 170 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| A D | rk3399-pinephone-pro.dts | 654 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>;
666 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>;
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| /dts/upstream/include/dt-bindings/clock/ |
| A D | rk3036-cru.h | 13 #define PLL_GPLL 3 macro
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| A D | rk3188-cru-common.h | 14 #define PLL_GPLL 4 macro
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| A D | rk3128-cru.h | 14 #define PLL_GPLL 4 macro
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| A D | rk3228-cru.h | 14 #define PLL_GPLL 4 macro
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| A D | rv1108-cru.h | 13 #define PLL_GPLL 2 macro
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| A D | px30-cru.h | 180 #define PLL_GPLL 1 macro
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| A D | rk3288-cru.h | 14 #define PLL_GPLL 4 macro
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| A D | rk3328-cru.h | 14 #define PLL_GPLL 4 macro
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| A D | rk3368-cru.h | 14 #define PLL_GPLL 5 macro
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| A D | rockchip,rk3562-cru.h | 15 #define PLL_GPLL 2 macro
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| A D | rockchip,rk3528-cru.h | 14 #define PLL_GPLL 2 macro
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| A D | rockchip,rk3576-cru.h | 21 #define PLL_GPLL 5 macro
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| A D | rockchip,rv1126-cru.h | 13 #define PLL_GPLL 1 macro
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| A D | rk3399-cru.h | 15 #define PLL_GPLL 5 macro
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| A D | rockchip,rk3588-cru.h | 21 #define PLL_GPLL 6 macro
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| A D | rk3568-cru.h | 73 #define PLL_GPLL 4 macro
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| /dts/upstream/Bindings/clock/ |
| A D | rockchip,px30-cru.yaml | 114 clocks = <&xin24m>, <&pmucru PLL_GPLL>;
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