Home
last modified time | relevance | path

Searched refs:SDMMC2 (Results 1 – 7 of 7) sorted by relevance

/dts/upstream/src/arm/st/
A Dstm32f7-pinctrl.dtsi280 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
281 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
282 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */
283 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC2 CLK */
284 <STM32_PINMUX('D', 7, AF11)>; /* SDMMC2 CMD */
293 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
294 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
295 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */
296 <STM32_PINMUX('D', 6, AF11)>; /* SDMMC2 CLK */
312 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2 D2 */
[all …]
A Dstm32f746.dtsi513 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC2)>;
A Dstm32h743.dtsi401 resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>;
/dts/upstream/include/dt-bindings/clock/
A Dstm32mp1-clks.h122 #define SDMMC2 109 macro
/dts/upstream/src/arm/nxp/imx/
A Dimx6qdl-var-som.dtsi368 /* SDMMC2 CD/WP */
/dts/upstream/src/arm/nvidia/
A Dtegra30-asus-transformer-common.dtsi158 /* SDMMC2 pinmux */
A Dtegra30-pegatron-chagall.dts124 /* SDMMC2 pinmux */

Completed in 26 milliseconds