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Searched refs:SRST_CORE0 (Results 1 – 15 of 15) sorted by relevance

/dts/upstream/include/dt-bindings/clock/
A Drk3036-cru.h99 #define SRST_CORE0 0 macro
A Drk3188-cru-common.h139 #define SRST_CORE0 3 macro
A Drk3128-cru.h154 #define SRST_CORE0 4 macro
A Drk3228-cru.h154 #define SRST_CORE0 4 macro
A Drk3308-cru.h222 #define SRST_CORE0 4 macro
A Dpx30-cru.h201 #define SRST_CORE0 4 macro
A Drk3288-cru.h199 #define SRST_CORE0 0 macro
A Drk3328-cru.h209 #define SRST_CORE0 4 macro
A Drockchip,rv1126-cru.h394 #define SRST_CORE0 4 macro
/dts/upstream/include/dt-bindings/reset/
A Drockchip,rk3528-cru.h15 #define SRST_CORE0 4 macro
/dts/upstream/src/arm/rockchip/
A Drk3188.dtsi28 resets = <&cru SRST_CORE0>;
A Drk3036.dtsi44 resets = <&cru SRST_CORE0>;
A Drk3128.dtsi52 resets = <&cru SRST_CORE0>;
A Drk322x.dtsi36 resets = <&cru SRST_CORE0>;
A Drk3288.dtsi70 resets = <&cru SRST_CORE0>;

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