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Searched refs:CFG_SYS_FLASH_BASE_PHYS (Results 1 – 24 of 24) sorted by relevance

/include/configs/
A DMPC8548CDS.h107 #define CFG_SYS_FLASH_BASE_PHYS 0xfff000000ull macro
109 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
113 {CFG_SYS_FLASH_BASE_PHYS + 0x800000, CFG_SYS_FLASH_BASE_PHYS}
A Dls1021atwr.h51 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
54 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
76 #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS }
A Dls1021aqds.h30 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
33 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
38 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
61 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \
62 CFG_SYS_FLASH_BASE_PHYS + 0x8000000}
A DT4240RDB.h62 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
151 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
157 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
177 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \
178 + 0x8000000, CFG_SYS_FLASH_BASE_PHYS}
A DP2041RDB.h83 #define CFG_SYS_FLASH_BASE_PHYS 0xfe0000000ull macro
85 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
127 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS + 0x8000000}
A Dls2080a_common.h65 #define CFG_SYS_FLASH_BASE_PHYS 0x80000000 macro
A DT208xQDS.h86 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
88 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
94 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
114 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \
115 + 0x8000000, CFG_SYS_FLASH_BASE_PHYS}
A Dls1046aqds.h38 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
54 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
59 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
81 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \
82 CFG_SYS_FLASH_BASE_PHYS + 0x8000000}
A Dp1_p2_rdb_pc.h186 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
188 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
191 #define CFG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) \
196 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS}
A DP1010RDB.h133 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
135 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
138 #define CFG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
155 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS}
A Dls1088a_common.h72 #define CFG_SYS_FLASH_BASE_PHYS 0x80000000 macro
A Dls1043aqds.h39 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
44 #define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \
65 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \
66 CFG_SYS_FLASH_BASE_PHYS + 0x8000000}
A DT102xRDB.h126 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
128 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
132 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
157 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS}
A Dls1043a_common.h63 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
A DT208xRDB.h86 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
88 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
109 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS }
A Dls1043ardb.h18 (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
40 #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS }
A DT104xRDB.h91 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) macro
119 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS}
A Dkmcent2.h179 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | \ macro
217 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS}
A Dturris_1x.h178 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
A Dls1088ardb.h26 (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
A Dls2080ardb.h39 (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
A Dls2080aqds.h32 (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
A Dls1088aqds.h28 (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
/include/configs/km/
A Dpg-wcom-ls102xa.h32 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE macro
35 #define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \
60 #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS }

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