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Searched refs:CFG_SYS_INIT_RAM_ADDR (Results 1 – 25 of 187) sorted by relevance

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/include/configs/
A Dzynq_cse.h17 #undef CFG_SYS_INIT_RAM_ADDR
19 #define CFG_SYS_INIT_RAM_ADDR 0xFFFDE000 macro
A Dstmark2.h46 #define CFG_SYS_INIT_RAM_ADDR 0x80000000 macro
80 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
82 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
95 #define CACR_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A Daspeed-common.h20 #define CFG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE + CONFIG_PRE_CON_BUF_SZ) macro
23 #define CFG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE) macro
A Damcore.h33 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
59 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
61 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A Dsocfpga_common.h15 #define CFG_SYS_INIT_RAM_ADDR 0xFFFF0000 macro
18 #define CFG_SYS_INIT_RAM_ADDR 0xFFE00000 macro
30 #if ((CONFIG_SYS_BOOTCOUNT_ADDR > CFG_SYS_INIT_RAM_ADDR) && \
31 (CONFIG_SYS_BOOTCOUNT_ADDR < (CFG_SYS_INIT_RAM_ADDR + \
A DM5272C3.h56 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
86 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
88 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM5275EVB.h66 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
95 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
97 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM5208EVBE.h46 #define CFG_SYS_INIT_RAM_ADDR 0x80000000 macro
88 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
90 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM5249EVB.h43 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
83 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
85 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM5282EVB.h59 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
93 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
95 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM53017EVB.h60 #define CFG_SYS_INIT_RAM_ADDR 0x80000000 macro
105 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
107 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A Dcobra5272.h113 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
148 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
150 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM5235EVB.h57 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
98 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
100 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM5329EVB.h54 #define CFG_SYS_INIT_RAM_ADDR 0x80000000 macro
105 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
107 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A Deb_cpu5282.h57 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
94 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
96 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM5373EVB.h56 #define CFG_SYS_INIT_RAM_ADDR 0x80000000 macro
105 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
107 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A DM5253DEMO.h63 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
101 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
103 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
A Drzn1-snarc.h10 #define CFG_SYS_INIT_RAM_ADDR 0x20000000 macro
A Dap121.h11 #define CFG_SYS_INIT_RAM_ADDR 0xbd000000 macro
A Dtplink_wdr4300.h11 #define CFG_SYS_INIT_RAM_ADDR 0xbd000000 macro
A Dap143.h11 #define CFG_SYS_INIT_RAM_ADDR 0xbd000000 macro
A Dap152.h11 #define CFG_SYS_INIT_RAM_ADDR 0xbd000000 macro
A Dxilinx_zynqmp_r5.h18 #define CFG_SYS_INIT_RAM_ADDR 0xFFFF0000 macro
A Dbrzynq.h18 #define CFG_SYS_INIT_RAM_ADDR 0xFFFF0000 macro
A Dpxa1908.h11 #define CFG_SYS_INIT_RAM_ADDR 0x10000000 macro

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