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Searched refs:GENMASK (Results 1 – 25 of 29) sorted by relevance

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/include/
A Dcadence-nand.h41 #define CMD_REG0_CT GENMASK(31, 30)
47 #define CMD_REG0_TN GENMASK(27, 24)
92 #define TRAN_CFG_0_OFFSET GENMASK(31, 16)
94 #define TRAN_CFG_0_SEC_CNT GENMASK(7, 0)
131 #define SDMA_TRD_NUM_SDMA_TRD GENMASK(2, 0)
135 #define CONTROL_DATA_CTRL_SIZE GENMASK(15, 0)
138 #define CTRL_VERSION_REV GENMASK(7, 0)
157 #define BCH_CFG_0_CORR_CAP_0 GENMASK(7, 0)
158 #define BCH_CFG_0_CORR_CAP_1 GENMASK(15, 8)
164 #define BCH_CFG_1_CORR_CAP_4 GENMASK(7, 0)
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A Ddw-i3c.h26 #define DEV_ADDR_DYNAMIC(x) (((x) << 16) & GENMASK(22, 16))
37 #define COMMAND_PORT_CMD(x) (((x) << 7) & GENMASK(14, 7))
38 #define COMMAND_PORT_TID(x) (((x) << 3) & GENMASK(6, 3))
67 #define RESPONSE_PORT_DATA_LEN(x) ((x) & GENMASK(15, 0))
72 #define QUEUE_THLD_CTRL_RESP_BUF_MASK GENMASK(15, 8)
76 #define DATA_BUFFER_THLD_CTRL_RX_BUF GENMASK(11, 8)
81 #define IBI_REQ_REJECT_ALL GENMASK(31, 0)
130 #define QUEUE_STATUS_LEVEL_CMD(x) ((x) & GENMASK(7, 0))
154 #define SCL_I3C_TIMING_LCNT(x) ((x) & GENMASK(7, 0))
169 #define SCL_EXT_LCNT_1(x) ((x) & GENMASK(7, 0))
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A Domap3_spi.h19 #define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2)
21 #define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7)
24 #define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12)
A Dturris-omnia-mcu-interface.h97 STS_MCU_TYPE_MASK = GENMASK(1, 0),
112 STS_BUTTON_COUNTER_MASK = GENMASK(15, 13)
130 FEAT_LED_STATE_EXT_MASK = GENMASK(4, 3),
153 FEAT_MCU_TYPE_MASK = GENMASK(17, 16),
169 EXT_STS_LED_STATES_MASK = GENMASK(31, 12),
215 INT_LED_STATES_MASK = GENMASK(31, 12),
244 CMD_xET_USB_OVC_PROT_PORT_MASK = GENMASK(3, 0),
A Darm_ffa_priv.h81 #define MAJOR_VERSION_MASK GENMASK(30, 16)
82 #define MINOR_VERSION_MASK GENMASK(15, 0)
98 #define GET_SELF_ENDPOINT_ID_MASK GENMASK(15, 0)
102 #define PREP_SELF_ENDPOINT_ID_MASK GENMASK(31, 16)
108 #define PREP_PART_ENDPOINT_ID_MASK GENMASK(15, 0)
A Dscmi_protocols.h100 (((attributes) & GENMASK(15, 8)) >> 8)
102 ((attributes) & GENMASK(7, 0))
196 #define SCMI_BASE_SET_PROTOCOL_PERMISSIONS_COMMAND GENMASK(7, 0)
559 #define SCMI_PWD_PSTATE_ID GENMASK(27, 0)
586 #define SCMI_PWD_PROTO_ATTRS_NUM_PWD(attributes) ((attributes) & GENMASK(15, 0))
745 #define SCMI_CLK_PROTO_ATTR_COUNT_MASK GENMASK(15, 0)
974 #define SCMI_VOLTD_CONFIG_MASK GENMASK(3, 0)
/include/soc/qcom/
A Dgeni-se.h87 #define DEFAULT_CGC_EN GENMASK(6, 0)
95 #define CLK_DIV_MSK GENMASK(15, 4)
106 #define CLK_SEL_MSK GENMASK(2, 0)
121 #define M_OPCODE_MSK GENMASK(31, 27)
123 #define M_PARAMS_MSK GENMASK(26, 0)
131 #define S_OPCODE_MSK GENMASK(31, 27)
133 #define S_PARAMS_MSK GENMASK(26, 0)
193 #define S_COMMON_GENI_S_IRQ_EN (GENMASK(5, 1) | GENMASK(13, 9) | \
197 #define WATERMARK_MSK GENMASK(5, 0)
200 #define TX_FIFO_WC GENMASK(27, 0)
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/include/linux/mfd/syscon/
A Datmel-matrix.h64 #define AT91_MATRIX_ULBT GENMASK(2, 0)
72 #define AT91_MATRIX_SLOT_CYCLE GENMASK(7, 0)
73 #define AT91_MATRIX_DEFMSTR_TYPE GENMASK(17, 16)
77 #define AT91_MATRIX_FIXED_DEFMSTR GENMASK(20, 18)
78 #define AT91_MATRIX_ARBT GENMASK(25, 24)
82 #define AT91_MATRIX_ITCM_SIZE GENMASK(3, 0)
87 #define AT91_MATRIX_DTCM_SIZE GENMASK(7, 4)
95 #define AT91_MATRIX_MPR(x) GENMASK(((x) * 0x4) + 1, ((x) * 0x4))
A Datmel-smc.h41 #define ATMEL_SMC_MODE_EXNWMODE_MASK GENMASK(5, 4)
48 #define ATMEL_SMC_MODE_DBW_MASK GENMASK(13, 12)
52 #define ATMEL_SMC_MODE_TDF_MASK GENMASK(19, 16)
58 #define ATMEL_SMC_MODE_PS_MASK GENMASK(29, 28)
/include/linux/usb/
A Dphy-rockchip-usbdp.h25 #define DP_LANE_SEL_N(n) GENMASK(2 * (n) + 1, 2 * (n))
26 #define DP_LANE_SEL_ALL GENMASK(7, 0)
34 #define CMN_DP_LANE_MUX_ALL GENMASK(7, 4)
35 #define CMN_DP_LANE_EN_ALL GENMASK(3, 0)
40 #define CMN_DP_TX_LINK_BW GENMASK(6, 5)
/include/renesas/
A Drzg2l-pfc.h44 #define RZG2L_GPIO_PORT_GET_PINCNT(x) (((x) & GENMASK(30, 28)) >> 28)
45 #define RZG2L_GPIO_PORT_GET_INDEX(x) (((x) & GENMASK(26, 20)) >> 20)
46 #define RZG2L_GPIO_PORT_GET_CFGS(x) ((x) & GENMASK(19, 0))
56 #define RZG2L_SINGLE_PIN_GET_PORT_OFFSET(x) (((x) & GENMASK(30, 24)) >> 24)
57 #define RZG2L_SINGLE_PIN_GET_BIT(x) (((x) & GENMASK(22, 20)) >> 20)
58 #define RZG2L_SINGLE_PIN_GET_CFGS(x) ((x) & GENMASK(19, 0))
64 #define MUX_PIN_ID_MASK GENMASK(15, 0)
65 #define MUX_FUNC_MASK GENMASK(31, 16)
/include/linux/soc/ti/
A Dcppi5.h49 #define CPPI5_INFO0_HDESC_TYPE_MASK GENMASK(31, 30)
63 #define CPPI5_INFO0_HDESC_PKTLEN_MASK GENMASK(21, 0)
70 #define CPPI5_INFO1_DESC_PKTID_MASK GENMASK(23, 14)
72 #define CPPI5_INFO1_DESC_FLOWID_MASK GENMASK(13, 0)
92 #define CPPI5_INFO2_DESC_RETQ_MASK GENMASK(15, 0)
97 #define CPPI5_INFO3_DESC_DSTTAG_MASK GENMASK(15, 0)
624 #define CPPI5_TR_TYPE_MASK GENMASK(3, 0)
628 #define CPPI5_TR_EVENT_SIZE_MASK GENMASK(7, 6)
630 #define CPPI5_TR_TRIGGER0_MASK GENMASK(9, 8)
634 #define CPPI5_TR_TRIGGER1_MASK GENMASK(13, 12)
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/include/linux/
A Dpruss_driver.h29 #define PRUSS_GPCFG_PRU_DIV1_MASK GENMASK(24, 20)
32 #define PRUSS_GPCFG_PRU_DIV0_MASK GENMASK(15, 19)
41 #define PRUSS_GPCFG_PRU_GPI_DIV1_MASK GENMASK(12, 8)
44 #define PRUSS_GPCFG_PRU_GPI_DIV0_MASK GENMASK(7, 3)
50 #define PRUSS_GPCFG_PRU_GPI_MODE_MASK GENMASK(1, 0)
54 #define PRUSS_GPCFG_PRU_MUX_SEL_MASK GENMASK(29, 26)
A Dbitops.h30 #define GENMASK(h, l) \ macro
33 #define GENMASK(h, l) \ macro
/include/linux/mtd/
A Dspi-nor.h202 #define SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK GENMASK(3, 0)
217 #define SNOR_PROTO_INST_MASK GENMASK(23, 16)
223 #define SNOR_PROTO_ADDR_MASK GENMASK(15, 8)
229 #define SNOR_PROTO_DATA_MASK GENMASK(7, 0)
338 #define SNOR_HWCAPS_READ_MASK GENMASK(15, 0)
343 #define SNOR_HWCAPS_READ_DUAL GENMASK(6, 3)
349 #define SNOR_HWCAPS_READ_QUAD GENMASK(10, 7)
355 #define SNOR_HWCPAS_READ_OCTO GENMASK(15, 11)
371 #define SNOR_HWCAPS_PP_MASK GENMASK(23, 16)
374 #define SNOR_HWCAPS_PP_QUAD GENMASK(19, 17)
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/include/power/
A Dstpmic1.h33 #define STPMIC1_BUCK_VOUT_MASK GENMASK(7, 2)
48 #define STPMIC1_LDO12356_VOUT_MASK GENMASK(6, 2)
/include/linux/i3c/
A Dccc.h200 #define I3C_CCC_STATUS_PENDING_INT(status) ((status) & GENMASK(3, 0))
203 (((status) & GENMASK(7, 6)) >> 6)
268 #define I3C_CCC_MAX_SDR_FSCL_MASK GENMASK(2, 0)
A Dmaster.h20 #define I3C_MAX_ADDR GENMASK(6, 0)
44 #define I3C_LVR_I2C_INDEX_MASK GENMASK(7, 5)
48 #define I2C_MAX_ADDR GENMASK(6, 0)
A Ddevice.h84 #define I3C_BCR_DEVICE_ROLE(bcr) ((bcr) & GENMASK(7, 6))
/include/usb/
A Dpd.h441 #define EUDO_USB_MODE_MASK GENMASK(30, 28)
448 #define EUDO_CABLE_SPEED_MASK GENMASK(23, 21)
454 #define EUDO_CABLE_TYPE_MASK GENMASK(20, 19)
460 #define EUDO_CABLE_CURRENT_MASK GENMASK(18, 17)
/include/fsl-mc/
A Dfsl_dpio.h27 GENMASK(DPIO_##field##_SHIFT + DPIO_##field##_SIZE - 1, \
A Dfsl_dpmac.h31 GENMASK(DPMAC_##field##_SHIFT + DPMAC_##field##_SIZE - 1, \
/include/net/pfe_eth/pfe/cbus/
A Dclass_csr.h168 #define HASH_CRC_PORT_IP GENMASK(13, 12)
/include/linux/clk/
A Dat91_pmc.h218 #define AT91_PMC_PCR_GCKDIV_MASK GENMASK(27, 20)
/include/dt-bindings/pinctrl/
A Dk210-pinctrl.h13 #define K210_PCF_MASK GENMASK(7, 0)

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