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Searched refs:reg (Results 1 – 25 of 40) sorted by relevance

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/include/power/
A Dab8500.h44 #define AB8500_USB(reg) AB8500_BANK(0x5, reg) argument
45 #define AB8500_TVOUT(reg) AB8500_BANK(0x6, reg) argument
46 #define AB8500_DBI(reg) AB8500_BANK(0x7, reg) argument
48 #define AB8500_RESERVED(reg) AB8500_BANK(0x9, reg) argument
49 #define AB8500_GPADC(reg) AB8500_BANK(0xA, reg) argument
50 #define AB8500_CHARGER(reg) AB8500_BANK(0xB, reg) argument
52 #define AB8500_AUDIO(reg) AB8500_BANK(0xD, reg) argument
54 #define AB8500_RTC(reg) AB8500_BANK(0xF, reg) argument
55 #define AB8500_GPIO(reg) AB8500_BANK(0x10, reg) argument
56 #define AB8500_MISC(reg) AB8500_BANK(0x10, reg) argument
[all …]
A Dpmic.h43 u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);
166 int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);
167 int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,
266 int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len);
276 int pmic_reg_read(struct udevice *dev, uint reg);
286 int pmic_reg_write(struct udevice *dev, uint reg, uint value);
300 int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
320 int check_reg(struct pmic *p, u32 reg);
324 int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
325 int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
[all …]
A Dtps62362.h26 int tps62362_voltage_update(unsigned char reg, unsigned char volt_sel);
A Dsandbox_pmic.h98 #define REG2VAL(min, step, reg) ((min) + ((step) * (reg))) argument
/include/linux/
A Dlitex.h44 _write_litex_subregister(val, reg); in litex_write8()
49 _write_litex_subregister(val, reg); in litex_write16()
54 _write_litex_subregister(val, reg); in litex_write32()
59 _write_litex_subregister(val >> 32, reg); in litex_write64()
60 _write_litex_subregister(val, reg + 4); in litex_write64()
63 static inline u8 litex_read8(void __iomem *reg) in litex_read8() argument
65 return _read_litex_subregister(reg); in litex_read8()
68 static inline u16 litex_read16(void __iomem *reg) in litex_read16() argument
70 return _read_litex_subregister(reg); in litex_read16()
75 return _read_litex_subregister(reg); in litex_read32()
[all …]
A Dclk-provider.h63 void __iomem *reg; member
101 void __iomem *reg; member
117 void __iomem *reg, u8 bit_idx,
127 void __iomem *reg; member
251 void __iomem *reg, u8 shift, u8 width,
257 void __iomem *reg, u8 shift, u8 width,
/include/
A Drtc.h69 int (*read)(struct udevice *dev, unsigned int reg,
81 int (*write)(struct udevice *dev, unsigned int reg,
91 int (*read8)(struct udevice *dev, unsigned int reg);
101 int (*write8)(struct udevice *dev, unsigned int reg, int val);
158 int dm_rtc_write(struct udevice *dev, unsigned int reg,
168 int rtc_read8(struct udevice *dev, unsigned int reg);
178 int rtc_write8(struct udevice *dev, unsigned int reg, int val);
265 int rtc_read8(int reg);
273 void rtc_write8(int reg, uchar val);
281 u32 rtc_read32(int reg);
[all …]
A Daxp209.h51 #define AXP209_VRC_DCDC2_SLOPE_SET(reg, cfg) \ argument
52 (((reg) & ~AXP209_VRC_DCDC2_MASK) | \
54 #define AXP209_VRC_LDO3_SLOPE_SET(reg, cfg) \ argument
55 (((reg) & ~AXP209_VRC_LDO3_MASK) | \
60 #define AXP209_LDO24_LDO2_SET(reg, cfg) \ argument
61 (((reg) & ~AXP209_LDO24_LDO2_MASK) | \
63 #define AXP209_LDO24_LDO4_SET(reg, cfg) \ argument
64 (((reg) & ~AXP209_LDO24_LDO4_MASK) | \
A Dsandbox-clk.h46 void __iomem *reg, u8 shift, in sandbox_clk_divider() argument
50 reg, shift, width, 0); in sandbox_clk_divider()
54 void __iomem *reg, u8 bit_idx, in sandbox_clk_gate() argument
58 reg, bit_idx, clk_gate_flags, NULL); in sandbox_clk_gate()
64 void __iomem *reg, u8 bit_idx,
69 void __iomem *reg, u8 shift) in sandbox_clk_gate2() argument
72 CLK_SET_RATE_PARENT, reg, shift, in sandbox_clk_gate2()
76 static inline struct clk *sandbox_clk_mux(const char *name, void __iomem *reg, in sandbox_clk_mux() argument
82 CLK_SET_RATE_NO_REPARENT, reg, shift, in sandbox_clk_mux()
A Dsdhci.h374 writel(val, host->ioaddr + reg); in sdhci_writel()
382 writew(val, host->ioaddr + reg); in sdhci_writew()
390 writeb(val, host->ioaddr + reg); in sdhci_writeb()
398 return readl(host->ioaddr + reg); in sdhci_readl()
406 return readw(host->ioaddr + reg); in sdhci_readw()
421 writel(val, host->ioaddr + reg); in sdhci_writel()
426 writew(val, host->ioaddr + reg); in sdhci_writew()
431 writeb(val, host->ioaddr + reg); in sdhci_writeb()
435 return readl(host->ioaddr + reg); in sdhci_readl()
440 return readw(host->ioaddr + reg); in sdhci_readw()
[all …]
A Dpalmas.h124 static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val) in palmas_i2c_write_u8() argument
126 return i2c_write(chip_no, reg, 1, &val, 1); in palmas_i2c_write_u8()
129 static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val) in palmas_i2c_read_u8() argument
131 return i2c_read(chip_no, reg, 1, val, 1); in palmas_i2c_read_u8()
134 int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val);
135 int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val);
A Ddwmmc.h235 static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val) in dwmci_writel() argument
237 writel(val, host->ioaddr + reg); in dwmci_writel()
242 writew(val, host->ioaddr + reg); in dwmci_writew()
245 static inline void dwmci_writeb(struct dwmci_host *host, int reg, u8 val) in dwmci_writeb() argument
247 writeb(val, host->ioaddr + reg); in dwmci_writeb()
250 static inline u32 dwmci_readl(struct dwmci_host *host, int reg) in dwmci_readl() argument
252 return readl(host->ioaddr + reg); in dwmci_readl()
255 static inline u16 dwmci_readw(struct dwmci_host *host, int reg) in dwmci_readw() argument
257 return readw(host->ioaddr + reg); in dwmci_readw()
260 static inline u8 dwmci_readb(struct dwmci_host *host, int reg) in dwmci_readb() argument
[all …]
A Dmiiphy.h22 int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
24 int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
74 int addr, int devad, int reg);
76 int addr, int devad, int reg, u16 value);
127 int (*read)(struct udevice *mdio_dev, int addr, int devad, int reg);
128 int (*write)(struct udevice *mdio_dev, int addr, int devad, int reg,
150 int dm_mdio_read(struct udevice *mdio_dev, int addr, int devad, int reg);
162 int dm_mdio_write(struct udevice *mdio_dev, int addr, int devad, int reg, u16 val);
A Dfdtdec.h35 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) argument
36 #define fdt_size_to_cpu(reg) be64_to_cpu(reg) argument
37 #define cpu_to_fdt_addr(reg) cpu_to_be64(reg) argument
38 #define cpu_to_fdt_size(reg) cpu_to_be64(reg) argument
45 #define fdt_addr_to_cpu(reg) be32_to_cpu(reg) argument
46 #define fdt_size_to_cpu(reg) be32_to_cpu(reg) argument
47 #define cpu_to_fdt_addr(reg) cpu_to_be32(reg) argument
48 #define cpu_to_fdt_size(reg) cpu_to_be32(reg) argument
A Dk3-clk.h34 u32 reg; member
41 u32 reg; member
51 u32 reg; member
79 u32 reg; member
104 .reg = _reg, \
113 .name = _name, .parent = _parent, .reg = _reg, \
123 .name = _name, .parent = _parent, .reg = _reg, \
131 .clk.pll = {.name = _name, .parent = _parent, .reg = _reg, .flags = _flags } \
139 .reg = _reg, .flags = _flags } \
184 void __iomem *reg);
A Dwait_bit.h39 static inline int wait_for_bit_##sfx(const void *reg, \
49 val = read(reg); \
70 reg, mask, set); \
A Ddebug_uart.h120 #define serial_dout(reg, value) \ argument
122 ((char *)reg - (char *)com_port) * \
125 #define serial_din(reg) \ argument
127 ((char *)reg - (char *)com_port) * \
A Di2c.h775 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
777 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
825 static inline u8 i2c_reg_read(u8 addr, u8 reg) in i2c_reg_read() argument
830 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); in i2c_reg_read()
833 i2c_read(addr, reg, 1, &buf, 1); in i2c_reg_read()
838 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) in i2c_reg_write() argument
842 __func__, addr, reg, val); in i2c_reg_write()
845 i2c_write(addr, reg, 1, &val, 1); in i2c_reg_write()
A Dsh_pfc.h45 unsigned long reg, reg_width, field_width; member
52 .reg = r, .reg_width = r_width, .field_width = f_width, \
57 .reg = r, .reg_width = r_width, \
63 unsigned long reg, reg_width, reg_shadow; member
69 .reg = r, .reg_width = r_width, \
184 #define PORTCR(nr, reg) \ argument
186 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
A Dphy.h69 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
70 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
115 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
116 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
120 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
123 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
A Dgdsys_fpga.h21 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data);
22 int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data);
A Dtwl4030.h651 static inline int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val) in twl4030_i2c_write_u8() argument
653 return i2c_write(chip_no, reg, 1, &val, 1); in twl4030_i2c_write_u8()
656 static inline int twl4030_i2c_read(u8 chip_no, u8 reg, u8 *val, int len) in twl4030_i2c_read() argument
658 return i2c_read(chip_no, reg, 1, val, len); in twl4030_i2c_read()
661 int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val);
662 int twl4030_i2c_read(u8 chip_no, u8 reg, u8 *val, int len);
665 static inline int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val) in twl4030_i2c_read_u8() argument
667 return twl4030_i2c_read(chip_no, reg, val, 1); in twl4030_i2c_read_u8()
/include/spmi/
A Dspmi.h17 int (*read)(struct udevice *dev, int usid, int pid, int reg);
18 int (*write)(struct udevice *dev, int usid, int pid, int reg,
31 int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg);
43 int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
/include/dm/
A Dpci.h38 static inline int pci_ofplat_get_devfn(u32 reg) in pci_ofplat_get_devfn() argument
40 return reg & 0xff00; in pci_ofplat_get_devfn()
/include/dm/platform_data/
A Dserial_mxc.h11 struct mxc_uart *reg; /* address of registers in physical memory */ member

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