| /include/env/ti/ |
| A D | k3_rproc.env | 14 env set rproc_id;
15 env set rproc_fw;
16 env set secure_suffix;
18 env set secure_suffix -sec;
22 env set rproc_id $i;
24 env set rproc_fw $i${secure_suffix};
26 env set rproc_id;
27 env set rproc_fw;
|
| /include/env/phytec/ |
| A D | rauc.env | 18 env set raucstatus;
26 env set mmcpart ${raucbootpart0};
27 env set mmcroot ${raucrootpart0};
28 env set raucargs rauc.slot=system0;
29 env set raucstatus success;
35 env set mmcpart ${raucbootpart1};
36 env set mmcroot ${raucrootpart1};
37 env set raucargs rauc.slot=system1;
38 env set raucstatus success;
47 env set BOOT_system0_LEFT 3;
[all …]
|
| /include/ |
| A D | p2sb.h | 110 void pcr_clrsetbits32(struct udevice *dev, uint offset, uint clr, uint set);
111 void pcr_clrsetbits16(struct udevice *dev, uint offset, uint clr, uint set);
112 void pcr_clrsetbits8(struct udevice *dev, uint offset, uint clr, uint set);
114 static inline void pcr_setbits32(struct udevice *dev, uint offset, uint set) in pcr_setbits32() argument
116 return pcr_clrsetbits32(dev, offset, 0, set); in pcr_setbits32()
119 static inline void pcr_setbits16(struct udevice *dev, uint offset, uint set) in pcr_setbits16() argument
121 return pcr_clrsetbits16(dev, offset, 0, set); in pcr_setbits16()
124 static inline void pcr_setbits8(struct udevice *dev, uint offset, uint set) in pcr_setbits8() argument
126 return pcr_clrsetbits8(dev, offset, 0, set); in pcr_setbits8()
|
| A D | wait_bit.h | 41 const bool set, \
51 if (!set) \
70 reg, mask, set); \
|
| A D | fsl_ddr.h | 22 #define ddr_clrsetbits32(a, clear, set) clrsetbits_le32(a, clear, set) argument
28 #define ddr_clrsetbits32(a, clear, set) clrsetbits_be32(a, clear, set) argument
|
| A D | sl28cpld.h | 14 uint8_t set);
|
| A D | mux-internal.h | 42 int (*set)(struct mux_control *mux, int state); member
|
| A D | bootcount.h | 36 int (*set)(struct udevice *dev, const u32 bootcount); member
|
| A D | phy.h | 314 u16 mask, u16 set);
316 u16 mask, u16 set);
323 u16 set);
|
| A D | gdsys_fpga.h | 42 u16 set; member
|
| A D | rtc.h | 46 int (*set)(struct udevice *dev, const struct rtc_time *time); member
|
| A D | pci.h | 1087 u32 clr, u32 set);
1111 int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set);
1112 int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set);
1113 int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set);
|
| A D | ppc_asm.tmpl | 190 mr r1,r21; /* set new kernel sp */ \
193 * Note: code which follows this uses cr0.eq (set if from kernel),
|
| A D | i2c.h | 257 int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set);
|
| /include/linux/ |
| A D | pruss_driver.h | 191 u32 set = enable ? PRUSS_MII_RT_EVENT_EN : 0; in pruss_cfg_miirt_enable() local
194 PRUSS_MII_RT_EVENT_EN, set); in pruss_cfg_miirt_enable()
204 u32 set = enable ? PRUSS_SPP_XFER_SHIFT_EN : 0; in pruss_cfg_xfr_enable() local
207 PRUSS_SPP_XFER_SHIFT_EN, set); in pruss_cfg_xfr_enable()
|
| A D | fb.h | 249 __u16 set; /* what to set */ member
358 __u16 set; /* what to set */ member
|
| /include/reboot-mode/ |
| A D | reboot-mode.h | 42 int (*set)(struct udevice *dev, u32 rebootmode); member
|
| /include/asm-generic/ |
| A D | gpio.h | 754 int dm_gpio_clrset_flags(struct gpio_desc *desc, ulong clr, ulong set);
783 ulong set);
|
| /include/env/adi/ |
| A D | adi_boot.env | 2 * A target board needs to set these variables for the commands below to work:
43 // rootpath is set by CONFIG_ROOTPATH
|
| /include/power/ |
| A D | pmic.h | 300 int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
|