1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Common SPI Interface: Controller-specific definitions
4  *
5  * (C) Copyright 2001
6  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
7  */
8 
9 #ifndef _SPI_H_
10 #define _SPI_H_
11 
12 #include <linux/bitops.h>
13 
14 struct spinand_info;
15 
16 /* SPI mode flags */
17 #define SPI_CPHA	BIT(0)	/* clock phase (1 = SPI_CLOCK_PHASE_SECOND) */
18 #define SPI_CPOL	BIT(1)	/* clock polarity (1 = SPI_POLARITY_HIGH) */
19 #define SPI_MODE_0	(0|0)			/* (original MicroWire) */
20 #define SPI_MODE_1	(0|SPI_CPHA)
21 #define SPI_MODE_2	(SPI_CPOL|0)
22 #define SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
23 #define SPI_CS_HIGH	BIT(2)			/* CS active high */
24 #define SPI_LSB_FIRST	BIT(3)			/* per-word bits-on-wire */
25 #define SPI_3WIRE	BIT(4)			/* SI/SO signals shared */
26 #define SPI_LOOP	BIT(5)			/* loopback mode */
27 #define SPI_SLAVE	BIT(6)			/* slave mode */
28 #define SPI_PREAMBLE	BIT(7)			/* Skip preamble bytes */
29 #define SPI_TX_BYTE	BIT(8)			/* transmit with 1 wire byte */
30 #define SPI_TX_DUAL	BIT(9)			/* transmit with 2 wires */
31 #define SPI_TX_QUAD	BIT(10)			/* transmit with 4 wires */
32 #define SPI_RX_SLOW	BIT(11)			/* receive with 1 wire slow */
33 #define SPI_RX_DUAL	BIT(12)			/* receive with 2 wires */
34 #define SPI_RX_QUAD	BIT(13)			/* receive with 4 wires */
35 #define SPI_TX_OCTAL	BIT(14)			/* transmit with 8 wires */
36 #define SPI_RX_OCTAL	BIT(15)			/* receive with 8 wires */
37 
38 /* Header byte that marks the start of the message */
39 #define SPI_PREAMBLE_END_BYTE	0xec
40 
41 #define SPI_DEFAULT_WORDLEN	8
42 
43 #define SPI_3BYTE_MODE 0x0
44 #define SPI_4BYTE_MODE 0x1
45 
46 /* Max no. of CS supported per spi device */
47 #define SPI_CS_CNT_MAX	2
48 
49 /**
50  * struct dm_spi_bus - SPI bus info
51  *
52  * This contains information about a SPI bus. To obtain this structure, use
53  * dev_get_uclass_priv(bus) where bus is the SPI bus udevice.
54  *
55  * @max_hz:	Maximum speed that the bus can tolerate.
56  * @speed:	Current bus speed. This is 0 until the bus is first claimed.
57  * @mode:	Current bus mode. This is 0 until the bus is first claimed.
58  *
59  * TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave.
60  */
61 struct dm_spi_bus {
62 	uint max_hz;
63 	uint speed;
64 	uint mode;
65 };
66 
67 /**
68  * struct dm_spi_plat - platform data for all SPI slaves
69  *
70  * This describes a SPI slave, a child device of the SPI bus. To obtain this
71  * struct from a spi_slave, use dev_get_parent_plat(dev) or
72  * dev_get_parent_plat(slave->dev).
73  *
74  * This data is immutable. Each time the device is probed, @max_hz and @mode
75  * will be copied to struct spi_slave.
76  *
77  * @cs:		Chip select number (0..n-1)
78  * @max_hz:	Maximum bus speed that this slave can tolerate
79  * @mode:	SPI mode to use for this device (see SPI mode flags)
80  */
81 struct dm_spi_slave_plat {
82 	unsigned int cs[SPI_CS_CNT_MAX];
83 	uint max_hz;
84 	uint mode;
85 };
86 
87 /**
88  * enum spi_clock_phase - indicates  the clock phase to use for SPI (CPHA)
89  *
90  * @SPI_CLOCK_PHASE_FIRST: Data sampled on the first phase
91  * @SPI_CLOCK_PHASE_SECOND: Data sampled on the second phase
92  */
93 enum spi_clock_phase {
94 	SPI_CLOCK_PHASE_FIRST,
95 	SPI_CLOCK_PHASE_SECOND,
96 };
97 
98 /**
99  * enum spi_wire_mode - indicates the number of wires used for SPI
100  *
101  * @SPI_4_WIRE_MODE: Normal bidirectional mode with MOSI and MISO
102  * @SPI_3_WIRE_MODE: Unidirectional version with a single data line SISO
103  */
104 enum spi_wire_mode {
105 	SPI_4_WIRE_MODE,
106 	SPI_3_WIRE_MODE,
107 };
108 
109 /**
110  * enum spi_polarity - indicates the polarity of the SPI bus (CPOL)
111  *
112  * @SPI_POLARITY_LOW: Clock is low in idle state
113  * @SPI_POLARITY_HIGH: Clock is high in idle state
114  */
115 enum spi_polarity {
116 	SPI_POLARITY_LOW,
117 	SPI_POLARITY_HIGH,
118 };
119 
120 /**
121  * struct spi_slave - Representation of a SPI slave
122  *
123  * For driver model this is the per-child data used by the SPI bus. It can
124  * be accessed using dev_get_parent_priv() on the slave device. The SPI uclass
125  * sets up per_child_auto to sizeof(struct spi_slave), and the
126  * driver should not override it. Two platform data fields (max_hz and mode)
127  * are copied into this structure to provide an initial value. This allows
128  * them to be changed, since we should never change platform data in drivers.
129  *
130  * If not using driver model, drivers are expected to extend this with
131  * controller-specific data.
132  *
133  * @dev:		SPI slave device
134  * @max_hz:		Maximum speed for this slave
135  * @bus:		ID of the bus that the slave is attached to. For
136  *			driver model this is the sequence number of the SPI
137  *			bus (dev_seq(bus)) so does not need to be stored
138  * @cs:			ID of the chip select connected to the slave.
139  * @mode:		SPI mode to use for this slave (see SPI mode flags)
140  * @wordlen:		Size of SPI word in number of bits
141  * @max_read_size:	If non-zero, the maximum number of bytes which can
142  *			be read at once.
143  * @max_write_size:	If non-zero, the maximum number of bytes which can
144  *			be written at once.
145  * @memory_map:		Address of read-only SPI flash access.
146  * @flags:		Indication of SPI flags.
147  */
148 struct spi_slave {
149 #if CONFIG_IS_ENABLED(DM_SPI)
150 	struct udevice *dev;	/* struct spi_slave is dev->parentdata */
151 	uint max_hz;
152 #else
153 	unsigned int bus;
154 	unsigned int cs;
155 #endif
156 	uint mode;
157 	unsigned int wordlen;
158 	unsigned int max_read_size;
159 	unsigned int max_write_size;
160 	void *memory_map;
161 
162 	u8 flags;
163 #define SPI_XFER_BEGIN		BIT(0)	/* Assert CS before transfer */
164 #define SPI_XFER_END		BIT(1)	/* Deassert CS after transfer */
165 #define SPI_XFER_ONCE		(SPI_XFER_BEGIN | SPI_XFER_END)
166 #define SPI_XFER_U_PAGE		BIT(4)
167 #define SPI_XFER_STACKED	BIT(5)
168 #define SPI_XFER_LOWER		BIT(6)
169 
170 	/*
171 	 * Flag indicating that the spi-controller has multi chip select
172 	 * capability and can assert/de-assert more than one chip select
173 	 * at once.
174 	 */
175 	bool multi_cs_cap;
176 	u32 bytemode;
177 };
178 
179 /**
180  * spi_do_alloc_slave - Allocate a new SPI slave (internal)
181  *
182  * Allocate and zero all fields in the spi slave, and set the bus/chip
183  * select. Use the helper macro spi_alloc_slave() to call this.
184  *
185  * @offset:	Offset of struct spi_slave within slave structure.
186  * @size:	Size of slave structure.
187  * @bus:	Bus ID of the slave chip.
188  * @cs:		Chip select ID of the slave chip on the specified bus.
189  */
190 void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
191 			 unsigned int cs);
192 
193 /**
194  * spi_alloc_slave - Allocate a new SPI slave
195  *
196  * Allocate and zero all fields in the spi slave, and set the bus/chip
197  * select.
198  *
199  * @_struct:	Name of structure to allocate (e.g. struct tegra_spi).
200  *		This structure must contain a member 'struct spi_slave *slave'.
201  * @bus:	Bus ID of the slave chip.
202  * @cs:		Chip select ID of the slave chip on the specified bus.
203  */
204 #define spi_alloc_slave(_struct, bus, cs) \
205 	spi_do_alloc_slave(offsetof(_struct, slave), \
206 			    sizeof(_struct), bus, cs)
207 
208 /**
209  * spi_alloc_slave_base - Allocate a new SPI slave with no private data
210  *
211  * Allocate and zero all fields in the spi slave, and set the bus/chip
212  * select.
213  *
214  * @bus:	Bus ID of the slave chip.
215  * @cs:		Chip select ID of the slave chip on the specified bus.
216  */
217 #define spi_alloc_slave_base(bus, cs) \
218 	spi_do_alloc_slave(0, sizeof(struct spi_slave), bus, cs)
219 
220 /**
221  * Set up communications parameters for a SPI slave.
222  *
223  * This must be called once for each slave. Note that this function
224  * usually doesn't touch any actual hardware, it only initializes the
225  * contents of spi_slave so that the hardware can be easily
226  * initialized later.
227  *
228  * @bus:	Bus ID of the slave chip.
229  * @cs:		Chip select ID of the slave chip on the specified bus.
230  * @max_hz:	Maximum SCK rate in Hz.
231  * @mode:	Clock polarity, clock phase and other parameters.
232  *
233  * Returns: A spi_slave reference that can be used in subsequent SPI
234  * calls, or NULL if one or more of the parameters are not supported.
235  */
236 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
237 		unsigned int max_hz, unsigned int mode);
238 
239 /**
240  * Free any memory associated with a SPI slave.
241  *
242  * @slave:	The SPI slave
243  */
244 void spi_free_slave(struct spi_slave *slave);
245 
246 /**
247  * Claim the bus and prepare it for communication with a given slave.
248  *
249  * This must be called before doing any transfers with a SPI slave. It
250  * will enable and initialize any SPI hardware as necessary, and make
251  * sure that the SCK line is in the correct idle state. It is not
252  * allowed to claim the same bus for several slaves without releasing
253  * the bus in between.
254  *
255  * @slave:	The SPI slave
256  *
257  * Returns: 0 if the bus was claimed successfully, or a negative value
258  * if it wasn't.
259  */
260 int spi_claim_bus(struct spi_slave *slave);
261 
262 /**
263  * Release the SPI bus
264  *
265  * This must be called once for every call to spi_claim_bus() after
266  * all transfers have finished. It may disable any SPI hardware as
267  * appropriate.
268  *
269  * @slave:	The SPI slave
270  */
271 void spi_release_bus(struct spi_slave *slave);
272 
273 /**
274  * Set the word length for SPI transactions
275  *
276  * Set the word length (number of bits per word) for SPI transactions.
277  *
278  * @slave:	The SPI slave
279  * @wordlen:	The number of bits in a word
280  *
281  * Returns: 0 on success, -1 on failure.
282  */
283 int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen);
284 
285 /**
286  * SPI transfer (optional if mem_ops is used)
287  *
288  * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
289  * "bitlen" bits in the SPI MISO port.  That's just the way SPI works.
290  *
291  * The source of the outgoing bits is the "dout" parameter and the
292  * destination of the input bits is the "din" parameter.  Note that "dout"
293  * and "din" can point to the same memory location, in which case the
294  * input data overwrites the output data (since both are buffered by
295  * temporary variables, this is OK).
296  *
297  * spi_xfer() interface:
298  * @slave:	The SPI slave which will be sending/receiving the data.
299  * @bitlen:	How many bits to write and read.
300  * @dout:	Pointer to a string of bits to send out.  The bits are
301  *		held in a byte array and are sent MSB first.
302  * @din:	Pointer to a string of bits that will be filled in.
303  * @flags:	A bitwise combination of SPI_XFER_* flags.
304  *
305  * Returns: 0 on success, not 0 on failure
306  */
307 int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
308 		void *din, unsigned long flags);
309 
310 /**
311  * spi_write_then_read - SPI synchronous write followed by read
312  *
313  * This performs a half duplex transaction in which the first transaction
314  * is to send the opcode and if the length of buf is non-zero then it start
315  * the second transaction as tx or rx based on the need from respective slave.
316  *
317  * @slave:	The SPI slave device with which opcode/data will be exchanged
318  * @opcode:	opcode used for specific transfer
319  * @n_opcode:	size of opcode, in bytes
320  * @txbuf:	buffer into which data to be written
321  * @rxbuf:	buffer into which data will be read
322  * @n_buf:	size of buf (whether it's [tx|rx]buf), in bytes
323  *
324  * Returns: 0 on success, not 0 on failure
325  */
326 int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
327 			size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
328 			size_t n_buf);
329 
330 /* Copy memory mapped data */
331 void spi_flash_copy_mmap(void *data, void *offset, size_t len);
332 
333 /**
334  * Determine if a SPI chipselect is valid.
335  * This function is provided by the board if the low-level SPI driver
336  * needs it to determine if a given chipselect is actually valid.
337  *
338  * Returns: 1 if bus:cs identifies a valid chip on this board, 0
339  * otherwise.
340  */
341 int spi_cs_is_valid(unsigned int bus, unsigned int cs);
342 
343 /*
344  * These names are used in several drivers and these declarations will be
345  * removed soon as part of the SPI DM migration. Drop them if driver model is
346  * enabled for SPI.
347  */
348 #if !CONFIG_IS_ENABLED(DM_SPI)
349 /**
350  * Activate a SPI chipselect.
351  * This function is provided by the board code when using a driver
352  * that can't control its chipselects automatically (e.g.
353  * common/soft_spi.c). When called, it should activate the chip select
354  * to the device identified by "slave".
355  */
356 void spi_cs_activate(struct spi_slave *slave);
357 
358 /**
359  * Deactivate a SPI chipselect.
360  * This function is provided by the board code when using a driver
361  * that can't control its chipselects automatically (e.g.
362  * common/soft_spi.c). When called, it should deactivate the chip
363  * select to the device identified by "slave".
364  */
365 void spi_cs_deactivate(struct spi_slave *slave);
366 #endif
367 
368 /**
369  * Set transfer speed.
370  * This sets a new speed to be applied for next spi_xfer().
371  * @slave:	The SPI slave
372  * @hz:		The transfer speed
373  *
374  * Returns:	0 on success, or a negative value on error.
375  */
376 int spi_set_speed(struct spi_slave *slave, uint hz);
377 
378 /**
379  * Write 8 bits, then read 8 bits.
380  * @slave:	The SPI slave we're communicating with
381  * @byte:	Byte to be written
382  *
383  * Returns: The value that was read, or a negative value on error.
384  *
385  * TODO: This function probably shouldn't be inlined.
386  */
spi_w8r8(struct spi_slave * slave,unsigned char byte)387 static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
388 {
389 	unsigned char dout[2];
390 	unsigned char din[2];
391 	int ret;
392 
393 	dout[0] = byte;
394 	dout[1] = 0;
395 
396 	ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
397 	return ret < 0 ? ret : din[1];
398 }
399 
400 /**
401  * struct spi_cs_info - Information about a bus chip select
402  *
403  * @dev:	Connected device, or NULL if none
404  */
405 struct spi_cs_info {
406 	struct udevice *dev;
407 };
408 
409 /**
410  * struct struct dm_spi_ops - Driver model SPI operations
411  *
412  * The uclass interface is implemented by all SPI devices which use
413  * driver model.
414  */
415 struct dm_spi_ops {
416 	/**
417 	 * Claim the bus and prepare it for communication.
418 	 *
419 	 * The device provided is the slave device. It's parent controller
420 	 * will be used to provide the communication.
421 	 *
422 	 * This must be called before doing any transfers with a SPI slave. It
423 	 * will enable and initialize any SPI hardware as necessary, and make
424 	 * sure that the SCK line is in the correct idle state. It is not
425 	 * allowed to claim the same bus for several slaves without releasing
426 	 * the bus in between.
427 	 *
428 	 * @dev:	The SPI slave
429 	 *
430 	 * Returns: 0 if the bus was claimed successfully, or a negative value
431 	 * if it wasn't.
432 	 */
433 	int (*claim_bus)(struct udevice *dev);
434 
435 	/**
436 	 * Release the SPI bus
437 	 *
438 	 * This must be called once for every call to spi_claim_bus() after
439 	 * all transfers have finished. It may disable any SPI hardware as
440 	 * appropriate.
441 	 *
442 	 * @dev:	The SPI slave
443 	 */
444 	int (*release_bus)(struct udevice *dev);
445 
446 	/**
447 	 * Set the word length for SPI transactions
448 	 *
449 	 * Set the word length (number of bits per word) for SPI transactions.
450 	 *
451 	 * @bus:	The SPI slave
452 	 * @wordlen:	The number of bits in a word
453 	 *
454 	 * Returns: 0 on success, -ve on failure.
455 	 */
456 	int (*set_wordlen)(struct udevice *dev, unsigned int wordlen);
457 
458 	/**
459 	 * SPI transfer
460 	 *
461 	 * This writes "bitlen" bits out the SPI MOSI port and simultaneously
462 	 * clocks "bitlen" bits in the SPI MISO port.  That's just the way SPI
463 	 * works.
464 	 *
465 	 * The source of the outgoing bits is the "dout" parameter and the
466 	 * destination of the input bits is the "din" parameter.  Note that
467 	 * "dout" and "din" can point to the same memory location, in which
468 	 * case the input data overwrites the output data (since both are
469 	 * buffered by temporary variables, this is OK).
470 	 *
471 	 * spi_xfer() interface:
472 	 * @dev:	The slave device to communicate with
473 	 * @bitlen:	How many bits to write and read.
474 	 * @dout:	Pointer to a string of bits to send out.  The bits are
475 	 *		held in a byte array and are sent MSB first.
476 	 * @din:	Pointer to a string of bits that will be filled in.
477 	 * @flags:	A bitwise combination of SPI_XFER_* flags.
478 	 *
479 	 * Returns: 0 on success, not -1 on failure
480 	 */
481 	int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout,
482 		    void *din, unsigned long flags);
483 
484 	/**
485 	 * Optimized handlers for SPI memory-like operations.
486 	 *
487 	 * Optimized/dedicated operations for interactions with SPI memory. This
488 	 * field is optional and should only be implemented if the controller
489 	 * has native support for memory like operations.
490 	 */
491 	const struct spi_controller_mem_ops *mem_ops;
492 
493 	/**
494 	 * Set transfer speed.
495 	 * This sets a new speed to be applied for next spi_xfer().
496 	 * @bus:	The SPI bus
497 	 * @hz:		The transfer speed
498 	 * @return 0 if OK, -ve on error
499 	 */
500 	int (*set_speed)(struct udevice *bus, uint hz);
501 
502 	/**
503 	 * Set the SPI mode/flags
504 	 *
505 	 * It is unclear if we want to set speed and mode together instead
506 	 * of separately.
507 	 *
508 	 * @bus:	The SPI bus
509 	 * @mode:	Requested SPI mode (SPI_... flags)
510 	 * @return 0 if OK, -ve on error
511 	 */
512 	int (*set_mode)(struct udevice *bus, uint mode);
513 
514 	/**
515 	 * Get information on a chip select
516 	 *
517 	 * This is only called when the SPI uclass does not know about a
518 	 * chip select, i.e. it has no attached device. It gives the driver
519 	 * a chance to allow activity on that chip select even so.
520 	 *
521 	 * @bus:	The SPI bus
522 	 * @cs:		The chip select (0..n-1)
523 	 * @info:	Returns information about the chip select, if valid.
524 	 *		On entry info->dev is NULL
525 	 * @return 0 if OK (and @info is set up), -EINVAL if the chip select
526 	 *	   is invalid, other -ve value on error
527 	 */
528 	int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);
529 
530 	/**
531 	 * get_mmap() - Get memory-mapped SPI
532 	 *
533 	 * @dev:	The SPI flash slave device
534 	 * @map_basep:	Returns base memory address for mapped SPI
535 	 * @map_sizep:	Returns size of mapped SPI
536 	 * @offsetp:	Returns start offset of SPI flash where the map works
537 	 *	correctly (offsets before this are not visible)
538 	 * @return 0 if OK, -EFAULT if memory mapping is not available
539 	 */
540 	int (*get_mmap)(struct udevice *dev, ulong *map_basep,
541 			uint *map_sizep, uint *offsetp);
542 
543 	/**
544 	 * setup_for_spinand() - Setup the SPI for attached SPI NAND
545 	 *
546 	 * @dev:	The SPI flash slave device
547 	 * @spinand_info: The SPI NAND info to configure for
548 	 * @return 0 if OK, -ve value on error
549 	 */
550 	int (*setup_for_spinand)(struct spi_slave *slave,
551 				 const struct spinand_info *spinand_info);
552 };
553 
554 struct dm_spi_emul_ops {
555 	/**
556 	 * SPI transfer
557 	 *
558 	 * This writes "bitlen" bits out the SPI MOSI port and simultaneously
559 	 * clocks "bitlen" bits in the SPI MISO port.  That's just the way SPI
560 	 * works. Here the device is a slave.
561 	 *
562 	 * The source of the outgoing bits is the "dout" parameter and the
563 	 * destination of the input bits is the "din" parameter.  Note that
564 	 * "dout" and "din" can point to the same memory location, in which
565 	 * case the input data overwrites the output data (since both are
566 	 * buffered by temporary variables, this is OK).
567 	 *
568 	 * spi_xfer() interface:
569 	 * @slave:	The SPI slave which will be sending/receiving the data.
570 	 * @bitlen:	How many bits to write and read.
571 	 * @dout:	Pointer to a string of bits sent to the device. The
572 	 *		bits are held in a byte array and are sent MSB first.
573 	 * @din:	Pointer to a string of bits that will be sent back to
574 	 *		the master.
575 	 * @flags:	A bitwise combination of SPI_XFER_* flags.
576 	 *
577 	 * Returns: 0 on success, not -1 on failure
578 	 */
579 	int (*xfer)(struct udevice *slave, unsigned int bitlen,
580 		    const void *dout, void *din, unsigned long flags);
581 };
582 
583 /**
584  * spi_find_bus_and_cs() - Find bus and slave devices by number
585  *
586  * Given a bus number and chip select, this finds the corresponding bus
587  * device and slave device. Neither device is activated by this function,
588  * although they may have been activated previously.
589  *
590  * @busnum:	SPI bus number
591  * @cs:		Chip select to look for
592  * @busp:	Returns bus device
593  * @devp:	Return slave device
594  * Return: 0 if found, -ENODEV on error
595  */
596 int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
597 			struct udevice **devp);
598 
599 /**
600  * spi_get_bus_and_cs() - Find and activate bus and slave devices by number
601  *
602  * Given a bus number and chip select, this finds the corresponding bus
603  * device and slave device.
604  *
605  * @busnum:	SPI bus number
606  * @cs:		Chip select to look for
607  * @busp:	Returns bus device
608  * @devp:	Return slave device
609  * @return 0 if found, -ve on error
610  */
611 int spi_get_bus_and_cs(int busnum, int cs,
612 		       struct udevice **busp, struct spi_slave **devp);
613 
614 /**
615  * _spi_get_bus_and_cs() - Find and activate bus and slave devices by number
616  * As spi_flash_probe(), This is an old-style function. We should remove
617  * it when all SPI flash drivers use dm
618  *
619  * Given a bus number and chip select, this finds the corresponding bus
620  * device and slave device.
621  *
622  * If no such slave exists, and drv_name is not NULL, then a new slave device
623  * is automatically bound on this chip select with requested speed and mode.
624  *
625  * Ths new slave device is probed ready for use with the speed and mode
626  * from plat when available or the requested values.
627  *
628  * @busnum:	SPI bus number
629  * @cs:		Chip select to look for
630  * @speed:	SPI speed to use for this slave when not available in plat
631  * @mode:	SPI mode to use for this slave when not available in plat
632  * @drv_name:	Name of driver to attach to this chip select
633  * @dev_name:	Name of the new device thus created
634  * @busp:	Returns bus device
635  * @devp:	Return slave device
636  * Return: 0 if found, -ve on error
637  */
638 int _spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
639 			const char *drv_name, const char *dev_name,
640 			struct udevice **busp, struct spi_slave **devp);
641 
642 /**
643  * spi_chip_select() - Get the chip select for a slave
644  *
645  * Return: the chip select this slave is attached to
646  */
647 int spi_chip_select(struct udevice *slave);
648 
649 /**
650  * spi_find_chip_select() - Find the slave attached to chip select
651  *
652  * @bus:	SPI bus to search
653  * @cs:		Chip select to look for
654  * @devp:	Returns the slave device if found
655  * Return: 0 if found, -EINVAL if cs is invalid, -ENODEV if no device attached,
656  *	   other -ve value on error
657  */
658 int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp);
659 
660 /**
661  * spi_slave_of_to_plat() - decode standard SPI platform data
662  *
663  * This decodes the speed and mode for a slave from a device tree node
664  *
665  * @blob:	Device tree blob
666  * @node:	Node offset to read from
667  * @plat:	Place to put the decoded information
668  */
669 int spi_slave_of_to_plat(struct udevice *dev, struct dm_spi_slave_plat *plat);
670 
671 /**
672  * spi_cs_info() - Check information on a chip select
673  *
674  * This checks a particular chip select on a bus to see if it has a device
675  * attached, or is even valid.
676  *
677  * @bus:	The SPI bus
678  * @cs:		The chip select (0..n-1)
679  * @info:	Returns information about the chip select, if valid
680  * Return: 0 if OK (and @info is set up), -ENODEV if the chip select
681  *	   is invalid, other -ve value on error
682  */
683 int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info);
684 
685 struct sandbox_state;
686 
687 /**
688  * sandbox_spi_get_emul() - get an emulator for a SPI slave
689  *
690  * This provides a way to attach an emulated SPI device to a particular SPI
691  * slave, so that xfer() operations on the slave will be handled by the
692  * emulator. If a emulator already exists on that chip select it is returned.
693  * Otherwise one is created.
694  *
695  * @state:	Sandbox state
696  * @bus:	SPI bus requesting the emulator
697  * @slave:	SPI slave device requesting the emulator
698  * @emuip:	Returns pointer to emulator
699  * Return: 0 if OK, -ve on error
700  */
701 int sandbox_spi_get_emul(struct sandbox_state *state,
702 			 struct udevice *bus, struct udevice *slave,
703 			 struct udevice **emulp);
704 
705 /**
706  * Claim the bus and prepare it for communication with a given slave.
707  *
708  * This must be called before doing any transfers with a SPI slave. It
709  * will enable and initialize any SPI hardware as necessary, and make
710  * sure that the SCK line is in the correct idle state. It is not
711  * allowed to claim the same bus for several slaves without releasing
712  * the bus in between.
713  *
714  * @dev:	The SPI slave device
715  *
716  * Returns: 0 if the bus was claimed successfully, or a negative value
717  * if it wasn't.
718  */
719 int dm_spi_claim_bus(struct udevice *dev);
720 
721 /**
722  * Release the SPI bus
723  *
724  * This must be called once for every call to dm_spi_claim_bus() after
725  * all transfers have finished. It may disable any SPI hardware as
726  * appropriate.
727  *
728  * @slave:	The SPI slave device
729  */
730 void dm_spi_release_bus(struct udevice *dev);
731 
732 /**
733  * SPI transfer
734  *
735  * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
736  * "bitlen" bits in the SPI MISO port.  That's just the way SPI works.
737  *
738  * The source of the outgoing bits is the "dout" parameter and the
739  * destination of the input bits is the "din" parameter.  Note that "dout"
740  * and "din" can point to the same memory location, in which case the
741  * input data overwrites the output data (since both are buffered by
742  * temporary variables, this is OK).
743  *
744  * dm_spi_xfer() interface:
745  * @dev:	The SPI slave device which will be sending/receiving the data.
746  * @bitlen:	How many bits to write and read.
747  * @dout:	Pointer to a string of bits to send out.  The bits are
748  *		held in a byte array and are sent MSB first.
749  * @din:	Pointer to a string of bits that will be filled in.
750  * @flags:	A bitwise combination of SPI_XFER_* flags.
751  *
752  * Returns: 0 on success, not 0 on failure
753  */
754 int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
755 		const void *dout, void *din, unsigned long flags);
756 
757 /**
758  * spi_get_mmap() - Get memory-mapped SPI
759  *
760  * @dev:	SPI slave device to check
761  * @map_basep:	Returns base memory address for mapped SPI
762  * @map_sizep:	Returns size of mapped SPI
763  * @offsetp:	Returns start offset of SPI flash where the map works
764  *	correctly (offsets before this are not visible)
765  * Return: 0 if OK, -ENOSYS if no operation, -EFAULT if memory mapping is not
766  *	available
767  */
768 int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
769 		    uint *offsetp);
770 
771 /* Access the operations for a SPI device */
772 #define spi_get_ops(dev)	((struct dm_spi_ops *)(dev)->driver->ops)
773 #define spi_emul_get_ops(dev)	((struct dm_spi_emul_ops *)(dev)->driver->ops)
774 
775 int spi_get_env_dev(void);
776 
777 #endif	/* _SPI_H_ */
778