1/** @file
2 * Copyright (c) 2018, Linaro Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-2-Clause-Patent
5 */
6
7#define __L1(cpuref, l2ref)                 \
8cpuref {                                    \
9    i-cache-size = <0x8000>;                \
10    i-cache-line-size = <64>;               \
11    i-cache-sets = <256>;                   \
12    d-cache-size = <0x8000>;                \
13    d-cache-line-size = <64>;               \
14    d-cache-sets = <128>;                   \
15    l2-cache = <l2ref>;                     \
16};
17
18#define __L2(idx)                           \
19L2_##idx: l2-cache##idx {                   \
20    cache-size = <0x40000>;                 \
21    cache-line-size = <64>;                 \
22    cache-sets = <256>;                     \
23    cache-unified;                          \
24    next-level-cache = <&L3>;               \
25};
26
27/ {
28    __L2(0)
29    __L2(1)
30    __L2(2)
31    __L2(3)
32    __L2(4)
33    __L2(5)
34    __L2(6)
35    __L2(7)
36    __L2(8)
37    __L2(9)
38    __L2(10)
39    __L2(11)
40
41    L3: l3-cache {
42        cache-level = <3>;
43        cache-size = <0x400000>;
44        cache-line-size = <64>;
45        cache-sets = <4096>;
46        cache-unified;
47    };
48};
49
50__L1(&CPU0, &L2_0)
51__L1(&CPU1, &L2_0)
52__L1(&CPU2, &L2_1)
53__L1(&CPU3, &L2_1)
54__L1(&CPU4, &L2_2)
55__L1(&CPU5, &L2_2)
56__L1(&CPU6, &L2_3)
57__L1(&CPU7, &L2_3)
58__L1(&CPU8, &L2_4)
59__L1(&CPU9, &L2_4)
60__L1(&CPU10, &L2_5)
61__L1(&CPU11, &L2_5)
62__L1(&CPU12, &L2_6)
63__L1(&CPU13, &L2_6)
64__L1(&CPU14, &L2_7)
65__L1(&CPU15, &L2_7)
66__L1(&CPU16, &L2_8)
67__L1(&CPU17, &L2_8)
68__L1(&CPU18, &L2_9)
69__L1(&CPU19, &L2_9)
70__L1(&CPU20, &L2_10)
71__L1(&CPU21, &L2_10)
72__L1(&CPU22, &L2_11)
73__L1(&CPU23, &L2_11)
74