| /arch/arm/cpu/armv7/sunxi/ |
| A D | psci.c | 30 #define SUNXI_CPU_RST(cpu) (0x40 + (cpu) * 0x40 + 0x0) argument
31 #define SUNXI_CPU_STATUS(cpu) (0x40 + (cpu) * 0x40 + 0x8) argument
46 #define SUN8I_R40_PWR_CLAMP(cpu) (0x120 + (cpu) * 0x4) argument
134 static void __secure sunxi_cpu_set_power(int cpu, bool on) in sunxi_cpu_set_power()
175 static void __secure sunxi_cpu_set_reset(int cpu, bool reset) in sunxi_cpu_set_reset()
191 static void __secure sunxi_cpu_set_locking(int cpu, bool lock) in sunxi_cpu_set_locking()
204 static bool __secure sunxi_cpu_poll_wfi(int cpu) in sunxi_cpu_poll_wfi()
214 static void __secure sunxi_cpu_invalidate_cache(int cpu) in sunxi_cpu_invalidate_cache()
227 u32 cpu = cpuid & 0x3; in sunxi_cpu_power_off() local
269 u32 scr, reg, cpu; in psci_fiq_enter() local
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| /arch/arm/mach-imx/imx8m/ |
| A D | psci.c | 26 #define EN_Cn_WFI_PDN(cpu) BIT(((((cpu) & 1) * 2) + (((cpu) & 2) * 8))) argument
27 #define GPC_PGC_nCTRL(cpu) (0x800 + ((cpu) * 0x40)) argument
30 #define COREn_A53_SW_PUP_REQ(cpu) BIT(cpu) argument
51 __secure static void psci_set_state(int cpu, u8 state) in psci_set_state()
58 __secure static s32 psci_cpu_on_validate_mpidr(u64 mpidr, u32 *cpu) in psci_cpu_on_validate_mpidr()
77 __secure static void psci_cpu_on_write_entry_point(const u32 cpu, u64 entry_point) in psci_cpu_on_write_entry_point()
91 __secure static void psci_cpu_on_power_on(const u32 cpu) in psci_cpu_on_power_on()
112 __secure static void psci_cpu_on_power_off(const u32 cpu) in psci_cpu_on_power_off()
133 u32 cpu = 0; in psci_cpu_on_64() local
154 u32 cpu = target_affinity & MPIDR_AFF0; in psci_affinity_info_64() local
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| /arch/arm/cpu/armv7/ |
| A D | psci-common.c | 30 void __secure psci_save(int cpu, u32 pc, u32 context_id) in psci_save()
37 u32 __secure psci_get_target_pc(int cpu) in psci_get_target_pc()
42 u32 __secure psci_get_context_id(int cpu) in psci_get_context_id()
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| /arch/powerpc/cpu/mpc8xxx/ |
| A D | cpu.c | 238 struct cpu_type *cpu = gd->arch.cpu; in cpu_mask() local
255 struct cpu_type *cpu = gd->arch.cpu; in cpu_dsp_mask() local
273 struct cpu_type *cpu = gd->arch.cpu; in cpu_num_dspcores() local
291 struct cpu_type *cpu = gd->arch.cpu; in cpu_numcores() local
329 struct cpu_type *cpu = gd->arch.cpu; in fixup_cpu() local
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| /arch/arm/mach-imx/mx7/ |
| A D | psci-mx7.c | 105 #define imx_cpu_gpr_entry_offset(cpu) \ argument
107 #define imx_cpu_gpr_para_offset(cpu) \ argument
138 static inline void psci_set_state(int cpu, u8 state) in psci_set_state()
150 __secure void imx_gpcv2_set_core_power(int cpu, bool pdn) in imx_gpcv2_set_core_power()
170 __secure void imx_enable_cpu_ca7(int cpu, bool enable) in imx_enable_cpu_ca7()
182 u32 cpu = psci_get_cpu_id(); in psci_arch_cpu_entry() local
190 u32 cpu = mpidr & MPIDR_AFF0; in psci_cpu_on() local
218 int cpu; in psci_cpu_off() local
281 u32 cpu = target_affinity & MPIDR_AFF0; in psci_affinity_info() local
392 static __secure void imx_gpcv2_set_cpu_power_gate_by_lpm(u32 cpu, bool pdn) in imx_gpcv2_set_cpu_power_gate_by_lpm()
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| /arch/arm/mach-stm32mp/stm32mp1/ |
| A D | fdt.c | 113 static void stm32mp13_fdt_fixup(void *blob, int soc, u32 cpu, char *name) in stm32mp13_fdt_fixup()
150 static void stm32mp15_fdt_fixup(void *blob, int soc, u32 cpu, char *name) in stm32mp15_fdt_fixup()
222 u32 cpu; in ft_system_setup() local
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| A D | psci.c | 195 static inline void psci_set_state(int cpu, u8 state) in psci_set_state()
212 static void __secure stm32mp_raise_sgi0(int cpu) in stm32mp_raise_sgi0()
224 u32 cpu = psci_get_cpu_id(); in psci_arch_cpu_entry() local
259 u32 cpu = target_affinity & MPIDR_AFF0; in psci_affinity_info() local
288 u32 cpu = target_cpu & MPIDR_AFF0; in psci_cpu_on() local
335 u32 cpu; in psci_cpu_off() local
705 u32 cpu = psci_get_cpu_id(); in psci_system_suspend() local
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| /arch/arm/dts/ |
| A D | omap34xx.dtsi | 14 cpu: cpu@0 { label
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| A D | omap36xx.dtsi | 20 cpu: cpu@0 { label
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| A D | corstone1000.dtsi | 28 cpu: cpu@0 { label
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| /arch/x86/cpu/intel_common/ |
| A D | microcode.c | 98 static void microcode_read_cpu(struct microcode_update *cpu) in microcode_read_cpu()
125 struct microcode_update cpu, update; in microcode_update_intel() local
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| /arch/x86/cpu/ |
| A D | mp_init.c | 202 static void ap_do_flight_plan(struct udevice *cpu) in ap_do_flight_plan()
504 static int bsp_do_flight_plan(struct udevice *cpu, struct mp_flight_plan *plan, in bsp_do_flight_plan()
675 static int ap_wait_for_instruction(struct udevice *cpu, void *unused) in ap_wait_for_instruction()
708 static int mp_init_cpu(struct udevice *cpu, void *unused) in mp_init_cpu()
842 struct udevice *cpu; in mp_init() local
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| A D | qfw_cpu.c | 22 char *cpu; in qemu_cpu_fixup() local
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| A D | cpu_x86.c | 58 int node, cpu; in cpu_x86_get_count() local
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| /arch/arm/mach-u8500/ |
| A D | cpuinfo.c | 16 u32 cpu = (asicid >> 8) & 0xffff; in print_cpuinfo() local
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| /arch/x86/cpu/apollolake/ |
| A D | punit.c | 24 struct udevice *cpu; in punit_init() local
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| A D | acpi.c | 84 struct udevice *cpu; in acpi_create_gnvs() local
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| /arch/nios2/dts/ |
| A D | 3c120_devboard.dts | 20 cpu: cpu@0x0 { label
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| A D | 10m50_devboard.dts | 20 cpu: cpu@0 { label
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| /arch/arm/mach-tegra/tegra20/ |
| A D | pmu.c | 31 int core, cpu; in pmu_set_nominal() local
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| /arch/arm/cpu/armv7/ls102xa/ |
| A D | clock.c | 20 unsigned int cpu; in get_sys_info() local
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| /arch/arm/mach-uniphier/arm32/ |
| A D | psci.c | 137 u32 cpu = cpuid & 0xff; in psci_cpu_on() local
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| /arch/arm/cpu/armv8/fsl-layerscape/ |
| A D | fsl_lsch3_speed.c | 33 unsigned int cpu; in get_sys_info() local
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| A D | fsl_lsch2_speed.c | 29 unsigned int cpu; in get_sys_info() local
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| /arch/arm/mach-renesas/ |
| A D | cpu_info.c | 103 char cpu[10] = { 0 }; in arch_misc_init() local
|