| /arch/powerpc/cpu/mpc83xx/ |
| A D | ecc.c | 17 struct ccsr_ddr __iomem *ddr = &immap->ddr; in ecc_print_status() local
19 ddr83xx_t *ddr = &immap->ddr; in ecc_print_status() local
101 struct ccsr_ddr __iomem *ddr = &immap->ddr; in do_ecc() local
103 ddr83xx_t *ddr = &immap->ddr; in do_ecc() local
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| A D | spd_sdram.c | 34 volatile ddr83xx_t *ddr = &immap->ddr; in board_add_ram_info() local
133 volatile ddr83xx_t *ddr = &immap->ddr; in spd_sdram() local
899 volatile ddr83xx_t *ddr= &immap->ddr; in ddr_enable_ecc() local
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| /arch/arm/dts/ |
| A D | stm32mp15-scmi-u-boot.dtsi | 31 ddr: ddr@5a003000 { label
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| A D | stm32mp15-u-boot.dtsi | 48 ddr: ddr@5a003000 { label
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| A D | stm32mp13-u-boot.dtsi | 115 ddr: ddr@5a003000 { label
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| A D | fsl-ls1028a.dtsi | 197 ddr: memory-controller@1080000 { label
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| /arch/arm/cpu/armv7/ls102xa/ |
| A D | soc.c | 116 struct ccsr_ddr __iomem *ddr = (void *)CFG_SYS_FSL_DDR_ADDR; in erratum_a008850_early() local
132 struct ccsr_ddr __iomem *ddr = (void *)CFG_SYS_FSL_DDR_ADDR; in erratum_a008850_post() local
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| A D | ls102xa_psci.c | 124 struct ccsr_ddr __iomem *ddr = (void *)CFG_SYS_FSL_DDR_ADDR; in ls1_start_fsm() local
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| /arch/arm/mach-imx/mx6/ |
| A D | ddr.c | 633 const struct mx6sx_iomux_ddr_regs *ddr, in mx6sx_dram_iocfg()
691 const struct mx6ul_iomux_ddr_regs *ddr, in mx6ul_dram_iocfg()
735 const struct mx6sl_iomux_ddr_regs *ddr, in mx6sl_dram_iocfg()
791 const struct mx6dq_iomux_ddr_regs *ddr, in mx6dq_dram_iocfg()
869 const struct mx6sdl_iomux_ddr_regs *ddr, in mx6sdl_dram_iocfg()
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| /arch/mips/mach-mtmips/mt7628/ |
| A D | init.c | 51 u32 val, ver, eco, pkg, ddr, chipmode, ee; in print_cpuinfo() local
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| /arch/arm/cpu/armv8/fsl-layerscape/ |
| A D | soc.c | 476 struct ccsr_ddr __iomem *ddr = (void *)CFG_SYS_FSL_DDR_ADDR; in erratum_a008850_early() local
496 struct ccsr_ddr __iomem *ddr = (void *)CFG_SYS_FSL_DDR_ADDR; in erratum_a008850_post() local
586 struct ccsr_ddr __iomem *ddr = (void *)CFG_SYS_FSL_DDR_ADDR; in ddr_enable_0v9_volt() local
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| /arch/mips/mach-ath79/ar934x/ |
| A D | clk.c | 266 u32 ctrl, cpu, cpupll, ddr, ddrpll; in ar934x_update_clock() local
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| /arch/powerpc/cpu/mpc85xx/ |
| A D | cpu.c | 471 struct ccsr_ddr __iomem *ddr[CONFIG_SYS_NUM_DDR_CTLRS]; in dump_spd_ddr_reg() local
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| /arch/mips/mach-ath79/qca953x/ |
| A D | lowlevel_init.S | 64 #define MK_PLL_CLK_CTRL(cpu, ddr, ahb) \ argument
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| /arch/m68k/include/asm/coldfire/ |
| A D | eport.h | 15 u8 ddr; /* 0x02 Data Direction */ member
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| /arch/powerpc/include/asm/ |
| A D | immap_83xx.h | 635 struct ccsr_ddr ddr; /* DDR Memory Controller Memory */ member
637 ddr83xx_t ddr; /* DDR Memory Controller Memory */ member
672 ddr83xx_t ddr; /* DDR Memory Controller Memory */ member
708 ddr83xx_t ddr; /* DDR Memory Controller Memory */ member
743 ddr83xx_t ddr; /* DDR Memory Controller Memory */ member
793 ddr83xx_t ddr; /* DDR Memory Controller Memory */ member
832 ddr83xx_t ddr; /* DDR Memory Controller Memory */ member
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| /arch/arm/include/asm/ |
| A D | omap_common.h | 535 const struct dpll_params *ddr; member
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