1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Device Tree Source for AM4372 SoC
4 *
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10
11#include "skeleton.dtsi"
12
13/ {
14	compatible = "ti,am4372", "ti,am43";
15	interrupt-parent = <&wakeupgen>;
16
17
18	aliases {
19		i2c0 = &i2c0;
20		i2c1 = &i2c1;
21		i2c2 = &i2c2;
22		serial0 = &uart0;
23		ethernet0 = &cpsw_emac0;
24		ethernet1 = &cpsw_emac1;
25		spi0 = &qspi;
26	};
27
28	cpus {
29		#address-cells = <1>;
30		#size-cells = <0>;
31		cpu: cpu@0 {
32			compatible = "arm,cortex-a9";
33			device_type = "cpu";
34			reg = <0>;
35
36			clocks = <&dpll_mpu_ck>;
37			clock-names = "cpu";
38
39			clock-latency = <300000>; /* From omap-cpufreq driver */
40		};
41	};
42
43	gic: interrupt-controller@48241000 {
44		compatible = "arm,cortex-a9-gic";
45		interrupt-controller;
46		#interrupt-cells = <3>;
47		reg = <0x48241000 0x1000>,
48		      <0x48240100 0x0100>;
49		interrupt-parent = <&gic>;
50	};
51
52	wakeupgen: interrupt-controller@48281000 {
53		compatible = "ti,omap4-wugen-mpu";
54		interrupt-controller;
55		#interrupt-cells = <3>;
56		reg = <0x48281000 0x1000>;
57		interrupt-parent = <&gic>;
58	};
59
60	l2-cache-controller@48242000 {
61		compatible = "arm,pl310-cache";
62		reg = <0x48242000 0x1000>;
63		cache-unified;
64		cache-level = <2>;
65	};
66
67	ocp {
68		compatible = "ti,am4372-l3-noc", "simple-bus";
69		#address-cells = <1>;
70		#size-cells = <1>;
71		ranges;
72		ti,hwmods = "l3_main";
73		reg = <0x44000000 0x400000
74		       0x44800000 0x400000>;
75		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
76			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
77
78		l4_wkup: l4_wkup@44c00000 {
79			compatible = "ti,am4-l4-wkup", "simple-bus";
80			#address-cells = <1>;
81			#size-cells = <1>;
82			ranges = <0 0x44c00000 0x287000>;
83
84			prcm: prcm@1f0000 {
85				compatible = "ti,am4-prcm";
86				reg = <0x1f0000 0x11000>;
87
88				prcm_clocks: clocks {
89					#address-cells = <1>;
90					#size-cells = <0>;
91				};
92
93				prcm_clockdomains: clockdomains {
94				};
95			};
96
97			scm: scm@210000 {
98				compatible = "ti,am4-scm", "simple-bus";
99				reg = <0x210000 0x4000>;
100				#address-cells = <1>;
101				#size-cells = <1>;
102				ranges = <0 0x210000 0x4000>;
103
104				am43xx_pinmux: pinmux@800 {
105					compatible = "ti,am437-padconf",
106						     "pinctrl-single";
107					reg = <0x800 0x31c>;
108					#interrupt-cells = <1>;
109					interrupt-controller;
110					pinctrl-single,register-width = <32>;
111					pinctrl-single,function-mask = <0xffffffff>;
112				};
113
114				scm_conf: scm_conf@0 {
115					compatible = "syscon";
116					reg = <0x0 0x800>;
117
118					scm_clocks: clocks {
119						#address-cells = <1>;
120						#size-cells = <0>;
121					};
122				};
123
124				scm_clockdomains: clockdomains {
125				};
126			};
127		};
128
129		emif: emif@4c000000 {
130			compatible = "ti,emif-am4372";
131			reg = <0x4c000000 0x1000000>;
132			ti,hwmods = "emif";
133		};
134
135		edma: edma@49000000 {
136			compatible = "ti,edma3";
137			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
138			reg =	<0x49000000 0x10000>,
139				<0x44e10f90 0x10>;
140			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
141					<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
142					<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
143			#dma-cells = <1>;
144		};
145
146		uart0: serial@44e09000 {
147			compatible = "ti,am4372-uart","ti,omap2-uart";
148			reg = <0x44e09000 0x2000>;
149			reg-shift = <2>;
150			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
151			ti,hwmods = "uart1";
152		};
153
154		uart1: serial@48022000 {
155			compatible = "ti,am4372-uart","ti,omap2-uart";
156			reg = <0x48022000 0x2000>;
157			reg-shift = <2>;
158			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
159			ti,hwmods = "uart2";
160			status = "disabled";
161		};
162
163		uart2: serial@48024000 {
164			compatible = "ti,am4372-uart","ti,omap2-uart";
165			reg = <0x48024000 0x2000>;
166			reg-shift = <2>;
167			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
168			ti,hwmods = "uart3";
169			status = "disabled";
170		};
171
172		uart3: serial@481a6000 {
173			compatible = "ti,am4372-uart","ti,omap2-uart";
174			reg = <0x481a6000 0x2000>;
175			reg-shift = <2>;
176			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
177			ti,hwmods = "uart4";
178			status = "disabled";
179		};
180
181		uart4: serial@481a8000 {
182			compatible = "ti,am4372-uart","ti,omap2-uart";
183			reg = <0x481a8000 0x2000>;
184			reg-shift = <2>;
185			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
186			ti,hwmods = "uart5";
187			status = "disabled";
188		};
189
190		uart5: serial@481aa000 {
191			compatible = "ti,am4372-uart","ti,omap2-uart";
192			reg = <0x481aa000 0x2000>;
193			reg-shift = <2>;
194			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
195			ti,hwmods = "uart6";
196			status = "disabled";
197		};
198
199		mailbox: mailbox@480C8000 {
200			compatible = "ti,omap4-mailbox";
201			reg = <0x480C8000 0x200>;
202			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
203			ti,hwmods = "mailbox";
204			#mbox-cells = <1>;
205			ti,mbox-num-users = <4>;
206			ti,mbox-num-fifos = <8>;
207			mbox_wkupm3: wkup_m3 {
208				ti,mbox-tx = <0 0 0>;
209				ti,mbox-rx = <0 0 3>;
210			};
211		};
212
213		timer1: timer@44e31000 {
214			compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
215			reg = <0x44e31000 0x400>;
216			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
217			ti,timer-alwon;
218			ti,hwmods = "timer1";
219		};
220
221		timer2: timer@48040000  {
222			compatible = "ti,am4372-timer","ti,am335x-timer";
223			reg = <0x48040000  0x400>;
224			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
225			ti,hwmods = "timer2";
226		};
227
228		timer3: timer@48042000 {
229			compatible = "ti,am4372-timer","ti,am335x-timer";
230			reg = <0x48042000 0x400>;
231			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
232			ti,hwmods = "timer3";
233			status = "disabled";
234		};
235
236		timer4: timer@48044000 {
237			compatible = "ti,am4372-timer","ti,am335x-timer";
238			reg = <0x48044000 0x400>;
239			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
240			ti,timer-pwm;
241			ti,hwmods = "timer4";
242			status = "disabled";
243		};
244
245		timer5: timer@48046000 {
246			compatible = "ti,am4372-timer","ti,am335x-timer";
247			reg = <0x48046000 0x400>;
248			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
249			ti,timer-pwm;
250			ti,hwmods = "timer5";
251			status = "disabled";
252		};
253
254		timer6: timer@48048000 {
255			compatible = "ti,am4372-timer","ti,am335x-timer";
256			reg = <0x48048000 0x400>;
257			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
258			ti,timer-pwm;
259			ti,hwmods = "timer6";
260			status = "disabled";
261		};
262
263		timer7: timer@4804a000 {
264			compatible = "ti,am4372-timer","ti,am335x-timer";
265			reg = <0x4804a000 0x400>;
266			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
267			ti,timer-pwm;
268			ti,hwmods = "timer7";
269			status = "disabled";
270		};
271
272		timer8: timer@481c1000 {
273			compatible = "ti,am4372-timer","ti,am335x-timer";
274			reg = <0x481c1000 0x400>;
275			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
276			ti,hwmods = "timer8";
277			status = "disabled";
278		};
279
280		timer9: timer@4833d000 {
281			compatible = "ti,am4372-timer","ti,am335x-timer";
282			reg = <0x4833d000 0x400>;
283			interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
284			ti,hwmods = "timer9";
285			status = "disabled";
286		};
287
288		timer10: timer@4833f000 {
289			compatible = "ti,am4372-timer","ti,am335x-timer";
290			reg = <0x4833f000 0x400>;
291			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
292			ti,hwmods = "timer10";
293			status = "disabled";
294		};
295
296		timer11: timer@48341000 {
297			compatible = "ti,am4372-timer","ti,am335x-timer";
298			reg = <0x48341000 0x400>;
299			interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
300			ti,hwmods = "timer11";
301			status = "disabled";
302		};
303
304		counter32k: counter@44e86000 {
305			compatible = "ti,am4372-counter32k","ti,omap-counter32k";
306			reg = <0x44e86000 0x40>;
307			ti,hwmods = "counter_32k";
308		};
309
310		rtc: rtc@44e3e000 {
311			compatible = "ti,am4372-rtc","ti,da830-rtc";
312			reg = <0x44e3e000 0x1000>;
313			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
314				      GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
315			ti,hwmods = "rtc";
316			status = "disabled";
317		};
318
319		wdt: wdt@44e35000 {
320			compatible = "ti,am4372-wdt","ti,omap3-wdt";
321			reg = <0x44e35000 0x1000>;
322			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
323			ti,hwmods = "wd_timer2";
324		};
325
326		gpio0: gpio@44e07000 {
327			compatible = "ti,am4372-gpio","ti,omap4-gpio";
328			reg = <0x44e07000 0x1000>;
329			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
330			gpio-controller;
331			#gpio-cells = <2>;
332			interrupt-controller;
333			#interrupt-cells = <2>;
334			ti,hwmods = "gpio1";
335			status = "disabled";
336		};
337
338		gpio1: gpio@4804c000 {
339			compatible = "ti,am4372-gpio","ti,omap4-gpio";
340			reg = <0x4804c000 0x1000>;
341			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
342			gpio-controller;
343			#gpio-cells = <2>;
344			interrupt-controller;
345			#interrupt-cells = <2>;
346			ti,hwmods = "gpio2";
347			status = "disabled";
348		};
349
350		gpio2: gpio@481ac000 {
351			compatible = "ti,am4372-gpio","ti,omap4-gpio";
352			reg = <0x481ac000 0x1000>;
353			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
354			gpio-controller;
355			#gpio-cells = <2>;
356			interrupt-controller;
357			#interrupt-cells = <2>;
358			ti,hwmods = "gpio3";
359			status = "disabled";
360		};
361
362		gpio3: gpio@481ae000 {
363			compatible = "ti,am4372-gpio","ti,omap4-gpio";
364			reg = <0x481ae000 0x1000>;
365			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
366			gpio-controller;
367			#gpio-cells = <2>;
368			interrupt-controller;
369			#interrupt-cells = <2>;
370			ti,hwmods = "gpio4";
371			status = "disabled";
372		};
373
374		gpio4: gpio@48320000 {
375			compatible = "ti,am4372-gpio","ti,omap4-gpio";
376			reg = <0x48320000 0x1000>;
377			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
378			gpio-controller;
379			#gpio-cells = <2>;
380			interrupt-controller;
381			#interrupt-cells = <2>;
382			ti,hwmods = "gpio5";
383			status = "disabled";
384		};
385
386		gpio5: gpio@48322000 {
387			compatible = "ti,am4372-gpio","ti,omap4-gpio";
388			reg = <0x48322000 0x1000>;
389			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
390			gpio-controller;
391			#gpio-cells = <2>;
392			interrupt-controller;
393			#interrupt-cells = <2>;
394			ti,hwmods = "gpio6";
395			status = "disabled";
396		};
397
398		hwspinlock: spinlock@480ca000 {
399			compatible = "ti,omap4-hwspinlock";
400			reg = <0x480ca000 0x1000>;
401			ti,hwmods = "spinlock";
402			#hwlock-cells = <1>;
403		};
404
405		i2c0: i2c@44e0b000 {
406			compatible = "ti,am4372-i2c","ti,omap4-i2c";
407			reg = <0x44e0b000 0x1000>;
408			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
409			ti,hwmods = "i2c1";
410			#address-cells = <1>;
411			#size-cells = <0>;
412			status = "disabled";
413		};
414
415		i2c1: i2c@4802a000 {
416			compatible = "ti,am4372-i2c","ti,omap4-i2c";
417			reg = <0x4802a000 0x1000>;
418			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
419			ti,hwmods = "i2c2";
420			#address-cells = <1>;
421			#size-cells = <0>;
422			status = "disabled";
423		};
424
425		i2c2: i2c@4819c000 {
426			compatible = "ti,am4372-i2c","ti,omap4-i2c";
427			reg = <0x4819c000 0x1000>;
428			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
429			ti,hwmods = "i2c3";
430			#address-cells = <1>;
431			#size-cells = <0>;
432			status = "disabled";
433		};
434
435		spi0: spi@48030000 {
436			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
437			reg = <0x48030000 0x400>;
438			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
439			ti,hwmods = "spi0";
440			#address-cells = <1>;
441			#size-cells = <0>;
442			status = "disabled";
443		};
444
445		mmc1: mmc@48060000 {
446			compatible = "ti,omap4-hsmmc";
447			reg = <0x48060000 0x1000>;
448			ti,hwmods = "mmc1";
449			ti,dual-volt;
450			ti,needs-special-reset;
451			dmas = <&edma 24
452				&edma 25>;
453			dma-names = "tx", "rx";
454			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
455			status = "disabled";
456		};
457
458		mmc2: mmc@481d8000 {
459			compatible = "ti,omap4-hsmmc";
460			reg = <0x481d8000 0x1000>;
461			ti,hwmods = "mmc2";
462			ti,needs-special-reset;
463			dmas = <&edma 2
464				&edma 3>;
465			dma-names = "tx", "rx";
466			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
467			status = "disabled";
468		};
469
470		mmc3: mmc@47810000 {
471			compatible = "ti,omap4-hsmmc";
472			reg = <0x47810000 0x1000>;
473			ti,hwmods = "mmc3";
474			ti,needs-special-reset;
475			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
476			status = "disabled";
477		};
478
479		spi1: spi@481a0000 {
480			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
481			reg = <0x481a0000 0x400>;
482			interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
483			ti,hwmods = "spi1";
484			#address-cells = <1>;
485			#size-cells = <0>;
486			status = "disabled";
487		};
488
489		spi2: spi@481a2000 {
490			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
491			reg = <0x481a2000 0x400>;
492			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
493			ti,hwmods = "spi2";
494			#address-cells = <1>;
495			#size-cells = <0>;
496			status = "disabled";
497		};
498
499		spi3: spi@481a4000 {
500			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
501			reg = <0x481a4000 0x400>;
502			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
503			ti,hwmods = "spi3";
504			#address-cells = <1>;
505			#size-cells = <0>;
506			status = "disabled";
507		};
508
509		spi4: spi@48345000 {
510			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
511			reg = <0x48345000 0x400>;
512			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
513			ti,hwmods = "spi4";
514			#address-cells = <1>;
515			#size-cells = <0>;
516			status = "disabled";
517		};
518
519		mac: ethernet@4a100000 {
520			compatible = "ti,am4372-cpsw","ti,cpsw";
521			reg = <0x4a100000 0x800
522			       0x4a101200 0x100>;
523			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
524				      GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
525				      GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
526				      GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
527			#address-cells = <1>;
528			#size-cells = <1>;
529			ti,hwmods = "cpgmac0";
530			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
531			clock-names = "fck", "cpts";
532			status = "disabled";
533			cpdma_channels = <8>;
534			ale_entries = <1024>;
535			bd_ram_size = <0x2000>;
536			no_bd_ram = <0>;
537			rx_descs = <64>;
538			mac_control = <0x20>;
539			slaves = <2>;
540			active_slave = <0>;
541			cpts_clock_mult = <0x80000000>;
542			cpts_clock_shift = <29>;
543			syscon = <&scm_conf>;
544			ranges;
545
546			davinci_mdio: mdio@4a101000 {
547				compatible = "ti,am4372-mdio","ti,davinci_mdio";
548				reg = <0x4a101000 0x100>;
549				#address-cells = <1>;
550				#size-cells = <0>;
551				ti,hwmods = "davinci_mdio";
552				bus_freq = <1000000>;
553				status = "disabled";
554			};
555
556			cpsw_emac0: slave@4a100200 {
557				/* Filled in by U-Boot */
558				mac-address = [ 00 00 00 00 00 00 ];
559			};
560
561			cpsw_emac1: slave@4a100300 {
562				/* Filled in by U-Boot */
563				mac-address = [ 00 00 00 00 00 00 ];
564			};
565
566			phy_sel: cpsw-phy-sel@44e10650 {
567				compatible = "ti,am43xx-cpsw-phy-sel";
568				reg= <0x44e10650 0x4>;
569				reg-names = "gmii-sel";
570			};
571		};
572
573		epwmss0: epwmss@48300000 {
574			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
575			reg = <0x48300000 0x10>;
576			#address-cells = <1>;
577			#size-cells = <1>;
578			ranges;
579			ti,hwmods = "epwmss0";
580			status = "disabled";
581
582			ecap0: ecap@48300100 {
583				compatible = "ti,am4372-ecap","ti,am33xx-ecap";
584				#pwm-cells = <3>;
585				reg = <0x48300100 0x80>;
586				ti,hwmods = "ecap0";
587				status = "disabled";
588			};
589
590			ehrpwm0: ehrpwm@48300200 {
591				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
592				#pwm-cells = <3>;
593				reg = <0x48300200 0x80>;
594				ti,hwmods = "ehrpwm0";
595				status = "disabled";
596			};
597		};
598
599		epwmss1: epwmss@48302000 {
600			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
601			reg = <0x48302000 0x10>;
602			#address-cells = <1>;
603			#size-cells = <1>;
604			ranges;
605			ti,hwmods = "epwmss1";
606			status = "disabled";
607
608			ecap1: ecap@48302100 {
609				compatible = "ti,am4372-ecap","ti,am33xx-ecap";
610				#pwm-cells = <3>;
611				reg = <0x48302100 0x80>;
612				ti,hwmods = "ecap1";
613				status = "disabled";
614			};
615
616			ehrpwm1: ehrpwm@48302200 {
617				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
618				#pwm-cells = <3>;
619				reg = <0x48302200 0x80>;
620				ti,hwmods = "ehrpwm1";
621				status = "disabled";
622			};
623		};
624
625		epwmss2: epwmss@48304000 {
626			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
627			reg = <0x48304000 0x10>;
628			#address-cells = <1>;
629			#size-cells = <1>;
630			ranges;
631			ti,hwmods = "epwmss2";
632			status = "disabled";
633
634			ecap2: ecap@48304100 {
635				compatible = "ti,am4372-ecap","ti,am33xx-ecap";
636				#pwm-cells = <3>;
637				reg = <0x48304100 0x80>;
638				ti,hwmods = "ecap2";
639				status = "disabled";
640			};
641
642			ehrpwm2: ehrpwm@48304200 {
643				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
644				#pwm-cells = <3>;
645				reg = <0x48304200 0x80>;
646				ti,hwmods = "ehrpwm2";
647				status = "disabled";
648			};
649		};
650
651		epwmss3: epwmss@48306000 {
652			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
653			reg = <0x48306000 0x10>;
654			#address-cells = <1>;
655			#size-cells = <1>;
656			ranges;
657			ti,hwmods = "epwmss3";
658			status = "disabled";
659
660			ehrpwm3: ehrpwm@48306200 {
661				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
662				#pwm-cells = <3>;
663				reg = <0x48306200 0x80>;
664				ti,hwmods = "ehrpwm3";
665				status = "disabled";
666			};
667		};
668
669		epwmss4: epwmss@48308000 {
670			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
671			reg = <0x48308000 0x10>;
672			#address-cells = <1>;
673			#size-cells = <1>;
674			ranges;
675			ti,hwmods = "epwmss4";
676			status = "disabled";
677
678			ehrpwm4: ehrpwm@48308200 {
679				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
680				#pwm-cells = <3>;
681				reg = <0x48308200 0x80>;
682				ti,hwmods = "ehrpwm4";
683				status = "disabled";
684			};
685		};
686
687		epwmss5: epwmss@4830a000 {
688			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
689			reg = <0x4830a000 0x10>;
690			#address-cells = <1>;
691			#size-cells = <1>;
692			ranges;
693			ti,hwmods = "epwmss5";
694			status = "disabled";
695
696			ehrpwm5: ehrpwm@4830a200 {
697				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
698				#pwm-cells = <3>;
699				reg = <0x4830a200 0x80>;
700				ti,hwmods = "ehrpwm5";
701				status = "disabled";
702			};
703		};
704
705		tscadc: tscadc@44e0d000 {
706			compatible = "ti,am3359-tscadc";
707			reg = <0x44e0d000 0x1000>;
708			ti,hwmods = "adc_tsc";
709			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
710			clocks = <&adc_tsc_fck>;
711			clock-names = "fck";
712			status = "disabled";
713
714			tsc {
715				compatible = "ti,am3359-tsc";
716			};
717
718			adc {
719				#io-channel-cells = <1>;
720				compatible = "ti,am3359-adc";
721			};
722
723		};
724
725		sham: sham@53100000 {
726			compatible = "ti,omap5-sham";
727			ti,hwmods = "sham";
728			reg = <0x53100000 0x300>;
729			dmas = <&edma 36>;
730			dma-names = "rx";
731			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
732		};
733
734		aes: aes@53501000 {
735			compatible = "ti,omap4-aes";
736			ti,hwmods = "aes";
737			reg = <0x53501000 0xa0>;
738			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
739			dmas = <&edma 6
740				&edma 5>;
741			dma-names = "tx", "rx";
742		};
743
744		des: des@53701000 {
745			compatible = "ti,omap4-des";
746			ti,hwmods = "des";
747			reg = <0x53701000 0xa0>;
748			interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
749			dmas = <&edma 34
750				&edma 33>;
751			dma-names = "tx", "rx";
752		};
753
754		mcasp0: mcasp@48038000 {
755			compatible = "ti,am33xx-mcasp-audio";
756			ti,hwmods = "mcasp0";
757			reg = <0x48038000 0x2000>,
758			      <0x46000000 0x400000>;
759			reg-names = "mpu", "dat";
760			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
761				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
762			interrupt-names = "tx", "rx";
763			status = "disabled";
764			dmas = <&edma 8>,
765			       <&edma 9>;
766			dma-names = "tx", "rx";
767		};
768
769		mcasp1: mcasp@4803C000 {
770			compatible = "ti,am33xx-mcasp-audio";
771			ti,hwmods = "mcasp1";
772			reg = <0x4803C000 0x2000>,
773			      <0x46400000 0x400000>;
774			reg-names = "mpu", "dat";
775			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
776				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
777			interrupt-names = "tx", "rx";
778			status = "disabled";
779			dmas = <&edma 10>,
780			       <&edma 11>;
781			dma-names = "tx", "rx";
782		};
783
784		elm: elm@48080000 {
785			compatible = "ti,am3352-elm";
786			reg = <0x48080000 0x2000>;
787			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
788			ti,hwmods = "elm";
789			clocks = <&l4ls_gclk>;
790			clock-names = "fck";
791			status = "disabled";
792		};
793
794		gpmc: gpmc@50000000 {
795			compatible = "ti,am3352-gpmc";
796			ti,hwmods = "gpmc";
797			clocks = <&l3s_gclk>;
798			clock-names = "fck";
799			reg = <0x50000000 0x2000>;
800			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
801			gpmc,num-cs = <7>;
802			gpmc,num-waitpins = <2>;
803			#address-cells = <2>;
804			#size-cells = <1>;
805			interrupt-controller;
806			#interrupt-cells = <2>;
807			status = "disabled";
808		};
809
810		am43xx_control_usb2phy1: control-phy@44e10620 {
811			compatible = "ti,control-phy-usb2-am437";
812			reg = <0x44e10620 0x4>;
813			reg-names = "power";
814		};
815
816		am43xx_control_usb2phy2: control-phy@0x44e10628 {
817			compatible = "ti,control-phy-usb2-am437";
818			reg = <0x44e10628 0x4>;
819			reg-names = "power";
820		};
821
822		ocp2scp0: ocp2scp@483a8000 {
823			compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
824			#address-cells = <1>;
825			#size-cells = <1>;
826			ranges;
827			ti,hwmods = "ocp2scp0";
828
829			usb2_phy1: phy@483a8000 {
830				compatible = "ti,am437x-usb2";
831				reg = <0x483a8000 0x8000>;
832				ctrl-module = <&am43xx_control_usb2phy1>;
833				clocks = <&usb_phy0_always_on_clk32k>,
834					 <&usb_otg_ss0_refclk960m>;
835				clock-names = "wkupclk", "refclk";
836				#phy-cells = <0>;
837				status = "disabled";
838			};
839		};
840
841		ocp2scp1: ocp2scp@483e8000 {
842			compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
843			#address-cells = <1>;
844			#size-cells = <1>;
845			ranges;
846			ti,hwmods = "ocp2scp1";
847
848			usb2_phy2: phy@483e8000 {
849				compatible = "ti,am437x-usb2";
850				reg = <0x483e8000 0x8000>;
851				ctrl-module = <&am43xx_control_usb2phy2>;
852				clocks = <&usb_phy1_always_on_clk32k>,
853					 <&usb_otg_ss1_refclk960m>;
854				clock-names = "wkupclk", "refclk";
855				#phy-cells = <0>;
856				status = "disabled";
857			};
858		};
859
860		dwc3_1: omap_dwc3@48380000 {
861			compatible = "ti,am437x-dwc3";
862			ti,hwmods = "usb_otg_ss0";
863			reg = <0x48380000 0x10000>;
864			interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
865			#address-cells = <1>;
866			#size-cells = <1>;
867			utmi-mode = <1>;
868			ranges;
869
870			usb1: usb@48390000 {
871				compatible = "synopsys,dwc3";
872				reg = <0x48390000 0x10000>;
873				interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
874				phys = <&usb2_phy1>;
875				phy-names = "usb2-phy";
876				maximum-speed = "high-speed";
877				dr_mode = "otg";
878				status = "disabled";
879				snps,dis_u3_susphy_quirk;
880				snps,dis_u2_susphy_quirk;
881			};
882		};
883
884		dwc3_2: omap_dwc3@483c0000 {
885			compatible = "ti,am437x-dwc3";
886			ti,hwmods = "usb_otg_ss1";
887			reg = <0x483c0000 0x10000>;
888			interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
889			#address-cells = <1>;
890			#size-cells = <1>;
891			utmi-mode = <1>;
892			ranges;
893
894			usb2: usb@483d0000 {
895				compatible = "synopsys,dwc3";
896				reg = <0x483d0000 0x10000>;
897				interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
898				phys = <&usb2_phy2>;
899				phy-names = "usb2-phy";
900				maximum-speed = "high-speed";
901				dr_mode = "otg";
902				status = "disabled";
903				snps,dis_u3_susphy_quirk;
904				snps,dis_u2_susphy_quirk;
905			};
906		};
907
908		qspi: qspi@47900000 {
909			compatible = "ti,am4372-qspi";
910			reg = <0x47900000 0x100>,
911			      <0x30000000 0x4000000>;
912			reg-names = "qspi_base", "qspi_mmap";
913			#address-cells = <1>;
914			#size-cells = <0>;
915			ti,hwmods = "qspi";
916			interrupts = <0 138 0x4>;
917			num-cs = <4>;
918			status = "disabled";
919		};
920
921		hdq: hdq@48347000 {
922			compatible = "ti,am4372-hdq";
923			reg = <0x48347000 0x1000>;
924			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
925			clocks = <&func_12m_clk>;
926			clock-names = "fck";
927			ti,hwmods = "hdq1w";
928			status = "disabled";
929		};
930
931		dss: dss@4832a000 {
932			compatible = "ti,omap3-dss";
933			reg = <0x4832a000 0x200>;
934			status = "disabled";
935			ti,hwmods = "dss_core";
936			clocks = <&disp_clk>;
937			clock-names = "fck";
938			#address-cells = <1>;
939			#size-cells = <1>;
940			ranges;
941
942			dispc: dispc@4832a400 {
943				compatible = "ti,omap3-dispc";
944				reg = <0x4832a400 0x400>;
945				interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
946				ti,hwmods = "dss_dispc";
947				clocks = <&disp_clk>;
948				clock-names = "fck";
949			};
950
951			rfbi: rfbi@4832a800 {
952				compatible = "ti,omap3-rfbi";
953				reg = <0x4832a800 0x100>;
954				ti,hwmods = "dss_rfbi";
955				clocks = <&disp_clk>;
956				clock-names = "fck";
957				status = "disabled";
958			};
959		};
960
961		ocmcram: ocmcram@40300000 {
962			compatible = "mmio-sram";
963			reg = <0x40300000 0x40000>; /* 256k */
964		};
965
966		dcan0: can@481cc000 {
967			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
968			ti,hwmods = "d_can0";
969			clocks = <&dcan0_fck>;
970			clock-names = "fck";
971			reg = <0x481cc000 0x2000>;
972			syscon-raminit = <&scm_conf 0x644 0>;
973			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
974			status = "disabled";
975		};
976
977		dcan1: can@481d0000 {
978			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
979			ti,hwmods = "d_can1";
980			clocks = <&dcan1_fck>;
981			clock-names = "fck";
982			reg = <0x481d0000 0x2000>;
983			syscon-raminit = <&scm_conf 0x644 1>;
984			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
985			status = "disabled";
986		};
987
988		vpfe0: vpfe@48326000 {
989			compatible = "ti,am437x-vpfe";
990			reg = <0x48326000 0x2000>;
991			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
992			ti,hwmods = "vpfe0";
993			status = "disabled";
994		};
995
996		vpfe1: vpfe@48328000 {
997			compatible = "ti,am437x-vpfe";
998			reg = <0x48328000 0x2000>;
999			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1000			ti,hwmods = "vpfe1";
1001			status = "disabled";
1002		};
1003	};
1004};
1005
1006/include/ "am43xx-clocks.dtsi"
1007